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Contents 1 UNDER COSTRUCTION, PLEASE SEE THIS POST IN RESERVE COPY 1.1 Basics 1.1.1 Fundamental Quantities 1.1.1.1 Voltage 1.1.1.2 Current 1.1.1.3 Power 1.1.1.4 Resistance 1.1.1.5 Frequency 1.1.2 Standard Conventions 1.2 Analysis Techniques 1.2.1 Kirchoffs Voltage Law 1.2.2 Kirchoffs Current Law 1.2.3 Nodal Analysis 1.2.4 Mesh Analysis 1.2.5 Superposition 1.2.6 Source Transformations 1.3 Passive Components 1.3.1 Resistors 1.3.2 Capacitors 1.3.3 Inductors 1.3.4 Transformers 1.3.5 Color Codes 1.3.5.1 Standard Values for Resistors, Capacitors and Inductors (E-Series) 1.3.6 Series RC 1.3.6.1 Transient Analysis 1.3.6.2 AC Analysis 1.3.7 Series RL 1.3.7.1 ransient Analysis 1.3.7.2 AC Analysis 1.3.8 Series LC 1.3.8.1 Transient Analysis 1.3.8.2 AC Analysis 1.3.9 Series RLC 1.3.9.1 Transient Analysis 1.3.9.2 AC Analysis 1.3.10 Parallel RC 1.3.10.1 Transient Analysis 1.3.10.2 AC Analysis 1.3.11 Parallel RL 1.3.11.1 Transient Analysis 1.3.11.2 AC Analysis 1.3.12 Parallel LC 1.3.12.1 Transient Analysis 1.3.12.2 AC Analysis 1.3.13 Parallel RLC 1.3.13.1 Transient Analysis 1.3.13.2 AC Analysis 1.4 Analog 1.4.1 Active 1.4.2 Amplifiers 1.4.3 Mathematics 1.4.4 Filter Theory 1.4.5 Bode Plots 1.4.6 Analog Notes 1.5 Noise 1.6 Digital 1.6.1 Digital Circuitry Basics 1.6.2 Sampling Theory 1.6.3 Digital Signal Processing 1.6.4 Digital Notes 1.7 Communications Theory 1.7.1 Transforms 1.7.1.1 Laplace 1.7.1.2 Fourier 1.7.1.3 Z-transform 1.7.2 Modulation 1.7.2.1 AM 1.7.2.2 FM 1.7.2.3 PCM 1.7.2.4 FSK 1.7.2.5 QAM 1.8 Semiconductors 1.8.1 Semiconductor Notes 1.9 Fiber Optics 1.9.1 Theory 1.9.2 Fiber Types - Fundamentals 1.9.3 Semiconductors 1.9.4 Other 1.9.5 Optics Notes 1.10 Notes 1.11 Reference 1.11.1 Appendices 1.11.2 Glossary 1.12 Index 1.13 References 1.14 Bibliography

UNDER COSTRUCTION, PLEASE SEE THIS POST IN RESERVE COPY

Basics

Fundamental Quantities

The following definitions offer clarification for the student. E=DC voltage. = vector voltage. v(t) = time varying voltage. I, , and i(t) = current.

Characteristics that can be verified against base SI units, or derived quantities.

Coulomb (derived) (C)

One Ampere-second. The charge on approximately 6.24 X 1018 electrons. Charge on one electron is 1.6 X 10-19C.

Voltage (derived) (V or E)

A volt is the Electromotive Force (EMF) required to energize a 1 watt load with 1 amp of current.

Resistance (derived) (R)

One ohm is the resistance needed to generate 1 Volt with 1 amp of current.

Current (base) (I)

This is a base standard of SI units, and is measured as the amount of current needed to create a force of 2 x 10-7 newtons per meter of length between two infinitely long, small,

parallel wires 1 meter apart. It is also one Coulomb/ second.

Capacitance (derived) (C)

One Farad is the size of a capacitor capable of holding 1 Coulomb at 1 Volt. C = Q / V

Inductance (derived) (L)

Inductance is the ratio of magnetic flux in a circuit to the current flowing in the circuit.

EQ XXX

One Henry provides 1 Volt when changing the current through a closed loop by 1 Amp/second.

Power (derived) (P)

A watt is defined as the amount of power that consumes one Joule per second. It is commonly defined as . Imaginary power does not convert to heat at the load. Is EQ XXX

always positive on passive circuits.

Energy (derived) (E)

A Joule is defined as the amount of energy dissipated by applying a force of one Newton (kg m/sec2) over a distance of one meter. Or

EQ XXX

A kilowatt hour is 3.6 x 106 joules.

Frequency (derived)

Frequency (f) is the reciprocal of the period of the waveform (T). A period is the time interval after which the signal repeats.

F = 1/T

Radian frequency is given by

EQ XXX

Voltage

Current

Power

Resistance

Frequency

Standard Conventions

Some terms or concepts with special meanings in Electronics.

Node

In a schematic or circuit, a point where multiple branches in the circuit join. A point where no voltage difference is possible.

Branch

In a schematic or circuit, a chain of components with a single current path.

Ground

2) That portion of a circuit that can be tied to the earth or safety power connections without current being drawn. Or, 4) 2) An arbitrary reference for a given circuit that cannot necessarily be equated with earth ground.

Load - That portion of a circuit that dissipates power or modifies input power, but does not generate power.

Source - That portion of a circuit capable of generating power.

Current Direction - Engineering convention is such that current flows from + to � terminals of a source. This is opposite to electron flow, but allows a number of other conventions to remain in force.

Open Circuit - A circuit through which no current flows.

Short Circuit - A circuit across which no voltage can be developed.

Decibel (dB) - Response in dB = EQ XXX.

Often decibels are expressed in terms of voltages and currents. Because both voltage and current have a square relationship to power, expressing these quantities in dB requires multiplying the above equation by 2.

Simple Resonance - In AC circuits with parallel RLC elements, damping describes the amount of energy stored in a circuit compared to that consumed. In a purely resistive circuit, the energy stored is equal to zero. Reactive circuits (circuits containing capacitors and/or inductors) can store energy during a transient to be dissipated later. Caution: The analysis below does not include parasitics and non-optimum materials issues which often predominate in a real-life circuit.

PICTURE

Frequency Domain - If we define resonant frequency and quality factor

EQ XXX

(note that since at resonance various shortcuts might be possible) then

Resonant Frequency -

EQ XXX

is the resonant frequency in radians per second. It is defined by the inductance and capacitance without regard to resistance. Quality Factor � EQ XXX Or EQ XXX

for parallel resonance. It is the inverse of this for series resonance.

Q defines the ratio of energy stored to energy dissipated during a cycle. Fundamentally, it gives a clue as to the amount of circulating energy in the resonant system that may not be visible outside the resonant system. Thus voltages across reactive components in series resonant circuits, and currents through reactive components in parallel resonant circuits can far exceed the voltages and currents that are visible across the resistive elements. Q is also the ratio of center frequency to the �3dB bandwidth.

Bandwidth - The bandwidth of a reactive circuit is the difference between the two frequencies where response changes by 3dB. Where DC is still full gain, it is the upper 3dB point. Definition can be dependent upon circuit topology, and whether current or voltage is the measured parameter.

Time Domain - The time domain response of a circuit is calculated by writing the equation for the circuit, assuming some initial conditions and solving a differential equation. EQ XXX which assumes the final form to be EQ XXX Use the quadratic equation to find the roots. Whether the discriminant shows two real roots, one root or two complex roots decides the damping.

Variables listed as An and are determined by initial conditions.

Under damped � EQ XXX

An underdamped circuit generally rings and may take excessive time to approach the final value. EQ XXX where EQ XXX Over damped - EQ XXX An overdamped circuit exhibits no ringing, and takes excessive time to asymptotically approach the final value. EQ XXX Where EQ XXX and EQ XXX Critically damped - EQ XXX A critically damped circuit approaches its final value in the least possible time. This occurs when EQ XXX where EQ XXX

Exponential Decay - EQ XXX Normal RL or RC time constants are exponential decays. The above shows the remaining amplitude when t = time constant EQ XXX

Analysis Techniques

The following covers some of the standard analysis techniques, which depend on a few fundamental principles.

Kirchoffs Voltage Law

Kirchoff�s Voltage Law - If you run around the loop and sum up all the voltages, the sum must be 0 for a steady-state condition. Depending which way you go, the source is positive and all the others are negative. If these are Z�s rather than R�s, then more care must be taken, but the result is still correct. EQ XXX

Kirchoffs Current Law

Kirchhoff�s Current Law - Similarly, if you sum all the currents into (or out of) a node, the sum must be zero. Again, with nonresistive elements, care must be taken but the result must hold.

Nodal Analysis

Nodal Analysis - Nodal analysis is the creation and solution of N-1 equations in N-1 unknowns for a circuit with N nodes. One node is defined as ground, so it doesn�t need further solution. All the rest of the analysis is relative to that reference ground.

Procedure:

1. Write down the node voltages for those nodes on voltage sources. These are some of the equations.

(x = Vn1-Vn2 where x is the value of the voltage source between N1 and N2)

1. Short the voltage sources out. This reduces the node count since two previously unconnected nodes are now tied together. Why does this work? Check source transformations.
2. Write the KCL equations for the remaining nodes, and express the currents as voltages across impedances. There should now be N-1 equations between those defined in 1 and 3.
3. Solve the equations. If the circuit includes Ls and Cs, this requires differential equations.

Mesh Analysis

Mesh Analysis - Mesh analysis is the creation and solution of N-1 equations in N-1 unknowns. (Why N-1? It takes two nodes to build a mesh.)

Procedure: 1) Write down the meshes. Label them. Assure the mesh is two dimensional. 2) Write down the current sources. 3) Open the current sources. See Source Transformations for rationale. 4) Write the equations for each remaining loop. Since there are only voltage sources and impedances left, the currents must be expressed in terms of volts and impedance. 5) Solve the resulting equations. Again, if there are Ls and Cs, this requires differential equations.

Superposition

In any linear circuit with multiple independent supplies, overall response can be calculated by calculating the response for each supply individually, with the remaining supplies shorted for voltage sources, or open for current sources.

Source Transformations

There are two important reasons for more completely discussing sources. First, the analysis techniques suggest understanding them better. Second, you won�t always have the source you need, and it is important to be able to comfortably swap to something you have.

In particular, current sources are much harder to make well than voltage sources.

EQ XXX

Where V=IR or I=V/R.

This works due to the definitions of voltage and current sources. A voltage source maintains the same voltage regardless of the current. Thus the output impedance is 0 (I1R = I2R requires R=0). Similarly, the output impedance of a current source is infinite (or undefined) since you can put any voltage across it and get the same current.

Passive Components

A basic description of passive components.

Ohms Law - EQ XXX where EQ XXX is the vector sum of a resistive (positive x axis) component and combined inductive EQ XXX and capacitive EQ XXX components.

Since 1/j is �j, capacitance uses the negative y axis and inductance the positive y axis in the imaginary plane when summing impedance.

Resistors

Resistance/Conductance - EQ XXX Resistance is that property of a conductor that opposes the flow of current. It causes the dissipation of real power. The diagram here is used by covering the quantity to be identified. What remains is the equation to calculate that quantity. E is calculated by multiplying I and R. I is calculated by putting E over R.

Capacitors

Capacitance - Capacitance is a measure of the propensity of parallel plates in a circuit to accumulate charge. No actual DC currents flow, but charges are added to and taken from the parallel plates giving the appearance of electron transfer as the voltage changes. EQ XXX or EQ XXX

Inductors

Inductance - Inductance is a measure of the unwillingness of a circuit or component to change current. EQ XXX

Transformers

Color Codes

Black 0 Brown 1 Red 2 Orange 3 Yellow 4 Green 5 Blue 6 Purple 7 Grey 8 White 9 Accuracy: None, 20% Silver 10%, Gold 5%

Value = (10*D1+D2)*10exponent EQ XXX

If exponent is Silver it is �2. If Gold �1. 1% and better resistors use four color bands for value.

Inductors and Capacitors sometimes use color bands or dots to indicate value.

Standard Values for Resistors, Capacitors and Inductors (E-Series)

Not every possible resistor value is practically available. These are the standard 5% values. 10% in bold. 20% in gray. For information on precision resistors check http://www.vishay.com/docs/31001/dectable.pdf

Inductors and capacitors generally use the same sequence. Often only the grayed box values, however.

International standard IEC 60063 defines another preferred number series that is commonly used for electronic components, especially resistors and capacitors. It works similarly to the Renard series, except that it subdivides the interval from 1 to 10 into 6, 12, 24, etc. steps. These subdivisions ensure that when some random value is replaced with the nearest preferred number, the maximum error will be in the order of 20%, 10%, 5%, etc.

Use of the E series is mostly restricted to resistors and capacitors. Commonly produced dimensions for other types of electrical components are either chosen from the Renard series instead or are defined in relevant product standard.

The IEC 60063 numbers are:

E6  ( 20%): 10    15    22    33    47    68

E12 ( 10%): 10 12 15 18 22 27 33 39 47 56 68 82

E24 (  5%): 10 11 12 13 15 16 18 20 22 24 27 30
            33 36 39 43 47 51 56 62 68 75 82 91

E48       : 100 105 110 115 121 127 133 140
            147 154 162 169 178 187 196 205
            215 226 237 249 261 274 287 301
            316 332 348 365 383 402 422 442
            464 487 511 536 562 590 619 649
            681 715 750 787 825 866 909 953             

E96 (  1%): 100 102 105 107 110 113 115 118
            121 124 127 130 133 137 140 143
            147 150 154 158 162 165 169 174
            178 182 187 191 196 200 205 210
            215 221 226 232 237 243 249 255
            261 267 274 280 287 294 301 309
            316 324 332 340 348 357 365 374
            383 392 402 412 422 432 442 453
            464 475 487 499 511 523 536 549
            562 576 590 604 619 634 649 665
            681 698 715 732 750 768 787 806
            825 845 866 887 909 931 953 976

E192 (0.5%) 100 101 102 104 105 106 107 109
            110 111 113 114 115 117 118 120 
            121 123 124 126 127 129 130 132 
            133 135 137 138 140 142 143 145 
            147 149 150 152 154 156 158 160 
            162 164 165 167 169 172 174 176 
            178 180 182 184 187 189 191 193 
            196 198 200 203 205 208 210 213 
            215 218 221 223 226 229 232 234 
            237 240 243 246 249 252 255 258 
            261 264 267 271 274 277 280 284 
            287 291 294 298 301 305 309 312 
            316 320 324 328 332 336 340 344 
            348 352 357 361 365 370 374 379 
            383 388 392 397 402 407 412 417 
            422 427 432 437 442 448 453 459 
            464 470 475 481 487 493 499 505 
            511 517 523 530 536 542 549 556 
            562 569 576 583 590 597 604 612 
            619 626 634 642 649 657 665 673 
            681 690 698 706 715 723 732 741 
            750 759 768 777 787 796 806 816 
            825 835 845 856 866 876 887 898 
            909 919 931 942 953 965 976 988

The E192 series is also used for 0.25% and 0.1% tolerance resistors.

Series RC

Transient Analysis

AC Analysis

Series RL

ransient Analysis

AC Analysis

Series LC

Transient Analysis

AC Analysis

Series RLC

Transient Analysis

AC Analysis

Parallel RC

Transient Analysis

AC Analysis

Parallel RL

Transient Analysis

AC Analysis

Parallel LC

Transient Analysis

AC Analysis

Parallel RLC

Transient Analysis

AC Analysis

Analog

Active

1.1 Diodes 1.1.1 Standard 1.1.2 Avalanche 1.1.3 Shotky 1.1.4 LEDs

1.2 Transistors 1.2.1 NPN 1.2.2 PNP

1.3 FETs 1.3.1 P Channel 1.3.2 N Channel

1.4 Other Discrete Semiconductors 1.4.1 SCRs 1.4.2 Triacs 1.4.3 UJT

Amplifiers

2.1 Classes 2.1.1 Class A 2.1.2 Class AB 2.1.3 Class B 2.1.4 Class C 2.1.5 Class D

2.2 Stability Circles

2.3 Feedback 2.3.1 Negative Feedback 2.3.2 Positive Feedback

2.4 Oscillations

2.5 Operational Amplifiers

2.6 Instrumentation Amplifiers

Mathematics

3.1	Trigonometry
3.2	Eulers Identity
3.3	Phasors
3.4	Diffy Q's

Filter Theory

4.1	Filter Types

4.1.1 Low Pass 4.1.2 High Pass 4.1.3 Band Pass 4.1.4 Band Reject

4.2	Filter ????

4.2.1 Butterworth 4.2.2 Chebyshev 4.2.3 Elliptical

4.3	Digital Filters

4.3.1 IIR 4.3.2 FIR

Bode Plots

The Bode plot takes the Laplace or Fourier based transfer function, and graphically shows expected magnitude and phase as a function of frequency. Zeros provide upwardly sloping lines with the inflection point at the -3dB frequency. Poles, downwardly. These can be graphically overlayed on a dB vs log frequency plot and linear phase vs log frequency plot to provide a visualization of the overall transfer function. Line slope is 20dB/decade * the exponent of the pole or zero. 20dB/decade = 6dB/octave.

Analog Notes

--- http://www.play-hookey.com/analog/

--- Analog Computer Basics

The modern analog computer is based on an electronic circuit known as an operational amplifier. Early operational amplifiers ("op amps" for short) used vacuum tubes, since that was the only available technology. Modern op amps are constructed as semiconductor integrated circuits. Either way, the general theory is the same.

We will discuss the internal workings of op amps in a separate page. For the overall discussion of analog computer circuits and op amp behavior in such applications, we will make three assumptions about op amps: They have infinite voltage gain. They have infinite input resistance (or zero input current). They have zero output resistance (infinite output current capability).

Although these assumptions aren't really correct, they're close enough that the circuit works well, so long as the electronic components connected to the amplifier to control its operation have reasonable values. For a discussion on typical IC op amps and their real-world characteristics, follow this link.

The figure to the right shows the basic circuit used in analog computers. The triangle represents our amplifier. For our discussions here, we'll assume standard IC amplifiers permitting a typical signal voltage range of �10 volts. Associated with the amplifier are two resistors: an input resistor (Rin) and a feedback resistor (Rf). In addition, we will state that the amplifier inverts the signal. That is, a positive input signal will result in a negative output signal, and vice-versa. With this combination of characteristics, we can use precision resistors and other components to accurately determine how the circuit will behave.

Now, let's consider what will happen if some input voltage is applied to the Vin connection. If no current flows through Rin, there will be no voltage drop across this resistor, and the applied input voltage will appear at the input to the amplifier itself. This will be amplified and inverted by the amplifier, which will try to produce an infinite but opposite output voltage (remember #1 above).

Obviously, this can't happen. That inverted output voltage will produce a voltage drop across both Rin and Rf, causing current to flow through both resistors. None of this current will be accepted or used by the amplifier itself (#2 above), so the current flowing through Rf must be the same as the current flowing through Rin.

To determine the current through the two resistors, we must determine the output voltage and the voltage at the amplifier input, where both resistors are connected. Once again, refer to #1 above. With an infinite voltage gain, any voltage at the amplifier's input will cause an excessive output voltage. Therefore, the voltage at the junction must always be zero. The amplifier output will provide whatever voltage is required to maintain that condition, and keep the currents through Rin and Rf the same.

This in turn means that so long as the circuit is operating within its bounds (output voltage within the range of �10 volts), the junction of these components will be a virtual ground. Knowing this, we can use Ohm's Law to calculate the currents through the two resistors. Furthermore, since the two currents must be exactly the same, we can set them equal to each other and use that relationship to determine the output voltage of the amplifier:Vout = - Vin

Rf Rin

Using a little algebra, we can solve this equation for Vout, or we can solve it for the ratio of Vout/Vin to get the voltage gain of the overall circuit:Vout = - Rf Vin

Rin

or,Vout = - Rf

Vin Rin

From these equations, we can see that the voltage gain of the overall circuit is set entirely by the ratio of Rf/Rin. This is the secret of the operational amplifier: it uses extremely high gain combined with a lot of negative feedback in order to achieve accurate and predictable results. If we use precision resistors, we can obtain precise and measurable results. --- Setting the Gain Coefficient

When we want to solve an algebraic equation, we typically find that any given unknown variable has a coefficient, or constant multiplier, associated with it. For example, consider a very simple equation: Y = 2X. In this equation, X is the unknown input value, and Y will be the result of the calculation. The number 2 is known as the coefficient applied to X.

In analog computers, the coefficient is set by adjusting the gain of the amplifier. The unknown input is applied as a voltage to the circuit input, and the output voltage, which will give the numerical answer to the equation for the current input voltage, can be directly measured. Keep in mind, of course, that the output voltage will also have the opposite polarity from the input voltage.

In the circuit to the right, The gain of the amplifier, and therefore the constant coefficient, is set by the input and feedback resistors. Remember that the effective gain of the circuit is Rf/Rin. Therefore, the gain of this particular circuit is 20k/10k = 2. Thus, any voltage X applied to the input will be doubled by the amplifier, producing a (negative) voltage Y at the output. If we must have the actual voltage Y, we can pass the -Y signal through an op amp with its gain set at -1. We could equally well invert the incoming X signal before applying it to the figure to the right.

Some equations include negatives directly. To the left is a circuit designed to solve the equation Y = -3X. As before, the constant coefficient (3 in this equation) is assigned as the gain of the amplifier.

Note that the coefficient does not have to be an integer � any desired coefficient can be set by selecting the proper ration of Rf/Rin. For example, if we exchanged the two resistors in the circuit to the left, we would be solving the equation Y = -X/3. Or, we could solve Y = -1.5X by replacing the 10k resistor to the left with a 20k resistor. Any basic linear equation can be solved using this type of circuit.

Resistors used in analog computers are not the typical standard resistor values. Rather, they are high-precision components intended and packaged for this application, and have values appropriate to this type of task.

--- Analog Addition

Linear equations are not always limited to a single input variable. In fact, most real-world equations involve a number of variables operating independently of each other. Fortunately, the operational amplifier is not limited to a single input signal.

Remember that the junction of Rf and Rin, which is also the input to the op amp, is a virtual ground. Therefore, we can add a second input resistor (or more) without causing any interference between input signals. The current through Rf will match the composite of all of the input currents, forcing the output voltage to reflect the combination of all input voltages and their individual coefficients. As a result, the common junction of all resistors is known as the summing junction, and the whole circuit becomes a summing amplifier.

The circuit shown to the right is designed to solve the equation Z = 2X - Y. Note that the two input resistors are not the same value; therefore each input signal has its own separate coefficient. Since Rf is necessarily common to both inputs, the coefficients must be set by selecting different input resistors for the input signals, according to the desired coefficients. Each input signal uses its own input resistor, Rin, and its own separate value of Rf/Rin to determine its coefficient. There is no interaction between input signals or resistors.

It is also possible to use multiple inputs to obtain coefficients that cannot be produced with the standard resistance values used in analog computers. For example, there is no 40k resistor (there is a 50k resistor, however). But to obtain 4X, we cannot use a single Rf and Rin to obtain this resistance ratio. What we can do, however, is to use a 20k feedback resistor and two 10k input resistors, and then apply the X signal to both inputs. The op amp will multiply X by 2 separately for each input, and then add the two signals together. This will produce a total of 4X.

There is no theoretical limit to the number of input signals that may be applied to an operational amplifier. However, as with many real-world situations, it is generally undesirable to apply more than four to six signals to a single amplifier. This is partly because too many signals can more easily cause the op amp to exceed its output voltage range, and partly because the more input resistors there are, the longer the internal wiring becomes, and longer wires can more easily pick up stray signals and electromagnetic fields. Any such stray signals will introduce errors into your results. --- Adding a Fixed Constant

Many equations require the inclusion of a fixed constant, which has no connection with any of the variables. For example, the general equation for a straight line is Y = mX + b, where m is the slope of the line and b is an offset, which defines the point at which this particular line will cross the Y axis on a graph. The next question to be answered, then, is how we can include such a fixed constant in our analog computer circuits.

To insert a constant into the equation, we need to introduce a fixed voltage. This is most easily done with a simple potentiometer, as shown to the left. The potentiometer is set to an appropriate voltage, and then connected to its own input resistor to the op amp. Thus, this input represents an "unvarying variable," which is a constant.

In an analog computer, a number of steps are taken to help ensure both accuracy and precision: The �10 volt source applied to the top of the potentiometer is carefully regulated. Either the positive or negative source can be connected to the potentiometer via a small jumper. The potentiometer is designed to be highly linear, and has a knob that is designed to make ten full rotations in order to turn the potentiometer over its range (a ten-turn potentiometer). The knob also locks in place once the correct setting has been made and verified. To allow for loading effects of the input resistor, the numbers on the dial are not assumed to be an accurate representation of the applied voltage. Instead, the actual voltage under load is measured and the potentiometer set to the desired voltage under loaded conditions.

If the required constant is in the range of �10, it can be applied directly, with the gain of that input set to 1. If the constant is larger, it is scaled down and then amplified. In some cases, the constant might be very small. In that case, it can be scaled up and its input set to a fractional gain. This allows accurate setting of the potentiometer. --- The Integrator

As we have said, the choice of the feedback element used with an operational amplifier has much to do with the behavior of the circuit. Therefore, we should explore what happens if we use different types of feedback components. In this example, we'll replace the feedback resistor with a capacitor and note the results.

In the circuit shown to the right, we have replaced the feedback resistor with a capacitor. Therefore, any feedback current must be based on a change in output voltage. As feedback current flows, the capacitor will gain an electric charge, which will change according to the cumulative effects of the output signal.

If the input voltage is zero, no input current will flow. Therefore no feedback current can flow and the output voltage will remain constant. If the input voltage is non-zero, the basic equation for the output voltage becomes Vout = -Vin/RC + K, where R is the input resistance in ohms, C is the feedback capacitance in farads, and K is a fixed constant representing the accumulated voltage from the past.

If the input voltage is constantly changing, the output voltage at any instant will be the integral of all past input voltage values. For example, a bipolar sine wave input will actually produce another sine wave as its output, at a phase angle of 90� from the input sine wave. Technically, the output will be an inverted cosine wave.

A couple of factors are of interest with these circuits: If the input is a constant positive dc voltage, the output will be a negative linear ramp. There is no exponential factor in an op amp integrator. The equation for the ramp will be Vout = -Vint/RC, where t is time in seconds. In an analog computer, an "initial condition" can be applied as a starting voltage on the capacitor, at the beginning of the integration process. The integrator has an automatic and natural tendency to damp out any high-frequency noise that may appear in the input signal. It is essential to avoid any long-term dc offset in the input voltage; if such an offset is present, it will cause the output voltage to gradually shift toward one extreme or the other, and stay there. In an analog computer, such an offset problem is avoided by limiting the time during which the integration process is allowed to continue. At the end of that time, the circuit is reset back to its initial conditions before being allowed to repeat the operation. --- The Differentiator

To obtain an op amp integrator, we replaced the feedback resistor with a capacitor. What if we keep the feedback resistor but use an input capacitor instead? Will we get a differentiator?

The circuit to the right shows an op amp connected as a differentiator. Since the input circuit element is a capacitor, this circuit will only experience input current in response to changes in input voltage � the faster and larger the change in input voltage, the greater the input current, therefore the greater the output voltage in response.

Since the output voltage will reflect the rate of change of the input, this circuit will indeed perform differentiation. The general equation for the output voltage is:Vout = -RC dVin

dt

The "d/dt" notation indicates differentiation with respect to time. If you're not familiar with differential calculus, don't worry about it here; you won't need it for these pages.

The op amp differentiator is not used in any analog computer application, and indeed not generally. The basic reason for this is that high-frequency noise signals will not be suppressed by this circuit; rather they will be amplified far beyond the amplification of the desired signal.

In some applications, it may be possible to add a series input resistor, as shown in the schematic diagram to the right. This limits the high frequency gain of the circuit to the ratio Rf/Rin. The low frequency gain is still set by Rf and C, as before. The cutoff frequency, where these two effects meet, is determined by Rin and C, according to the expression: fco = 1/2RinC.

Higher-frequency signals are still amplified more than low-frequency signals, so any noise present in the circuit will still be amplified more than the desired signal. If an application can suppress such noise and doesn't require higher-frequency components, this modified circuit may serve the need. In other cases, if differentiation is absolutely required, a passive RC circuit is generally used instead, and the inevitable signal losses compensated later. --- Logarithmic Amplifiers

Sometimes we do not want a linear response from an op amp circuit. For example, what if we want the output voltage to represent the natural logarithm of the input voltage? What can we do for a feedback element to accomplish this?

The answer is to use an electronic component that has a logarithmic relationship between the voltage applied to it and the current flowing through it. Such a component is the semiconductor diode, which can be used as a feedback element as shown to the right.

The semiconductor diode has the property that the current through it increases exponentially as the applied voltage increases linearly. In general use, this means that a silicon diode experiences an internal voltage drop of about 0.65 to 0.7 volt for a reasonable circuit current range. (For germanium diodes, it is about 0.3 volt.) However, it also means that the voltage will increase logarithmically if we control the applied current rather than the voltage. This is the normal behavior of the operational amplifier, so this is a highly practical method of generating a logarithm.

In the circuit shown, the applied input voltage must be positive, and the output voltage will be a negative logarithmic representation. Mathematically this is appropriate; you cannot find the logarithm of a negative number. However, sometimes you need a logarithmic response of either polarity. In such a case, you can connect a second diode in parallel with the one shown, but oriented in the opposite direction.

A practical problem with a simple diode is the inherent internal resistance of any semiconductor material. This resistance is also subject to change with temperature, and may actually cause some internal heating in some applications. To reduce the problem, a transistor may be substituted for the diode as shown to the left.

In this circuit, the relatively high base resistance of the transistor is bypassed as most of the emitter current will flow through the collector region instead. Nevertheless, the logarithmic voltage/current characteristics of the emitter-base junction will still be in effect, so the circuit will perform quite well as a logarithmic amplifier. As with the diode circuit, you can get bipolar behavior if you connect a PNP transistor in parallel with the NPN transistor shown. --- Non-Inverting Amplifiers

We have said that the operational amplifiers in an analog computer are always connected so that they invert the output signal even as they add input signals together. This is necessary, so that the summing junction remains at a virtual ground, thus preventing various input resistors from affecting other input signals. But what if we have only a single input signal? Can we apply it to an op amp in such a way as to obtain a controllable gain without signal inversion?

The circuit to the right shows a non-inverting op amp circuit. In this circuit, the input signal is effectively used as the reference voltage at the "+" input to the differential amplifier, while the "-" input is indirectly referenced to ground. In order to keep the two input voltages to the amplifier the same, the amplifier must set Vout to whatever voltage is required to make the feedback voltage to the "-" input match the input voltage to the "+" input.

Since Rf and Rin form a voltage divider, the feedback voltage will be VoutRin/(Rf + Rin). The gain of this circuit, then, calculated as Vout/Vin, is (Rf + Rin)/Rin, or (Rf/Rin) + 1. Resistor Rz has no effect on the gain of the circuit. However, to balance out variations caused by the small input current to the amplifier, Rz should be made equal to the parallel combination of Rf and Rin.

As we said at the top of this page, it is not generally a good idea to apply multiple input signals and resistors to the non-inverting amplifier. That doesn't mean it can't be done; there are some special-purpose circuits that use the interactions quite effectively. Indeed, a notable application of multiple inputs to a non-inverting amplifier is the R-2R ladder network used in some digital to analog conversion circuits. But unless you're prepared to do some very careful analysis and circuit testing, you should avoid multiple inputs to this circuit. --- A Difference Amplifier

Sometimes it is desirable to obtain the difference between two signals. Of course, it is possible to apply one signal to an analog inverter and then sum the two together. However, perhaps there is an easier way to accomplish the same result.

The circuit to the right combines features of the normal inverting amplifier and the non-inverting amplifier. Note that there are two resistors Rf as well as two Rin resistors. For correct circuit operation, it is important that the two pairs be matched. With the circuit shown, the equation for the output voltage is:Vout = Rf (V2 - V1)

Rin

This circuit operates cleanly and accurately, but does have a limitation. You cannot use it for summing multiple signals at the "-" input, because that input is no longer at a virtual ground. As a result, additional input signals to this point will interact with each other and produce distorted results. --- Increasing the Output Current

One of the very useful facts about operational amplifier circuits is that the amplifier itself will generate whatever output voltage is necessary to exactly match the feedback current to the total input current. In most cases, this means matching the output voltage to the applied combination of input voltages (remember the inversion!), as multiplied by their coefficients. We can use this fact to insert a number of different components between the amplifier output and the designated Vout, in order to modify the overall limits and behavior of the circuit. This page shows one such practical modification.

In the circuit to the right, we have added a pair of transistors to the output circuit. Note that we have placed them inside the feedback loop, in such a way as to include their behavior in determining the output voltage and current of the overall circuit. As a result, any non-linearities of the transistors will automatically be compensated by the action of the op amp. The actual Vout will still be determined entirely by the ratio of Rf/Rin.

The effect of the added transistors, then, is utterly transparent to the operation of the circuit. What they accomplish here is to increase the available output current to any following circuits. Instead of a limit of 5 mA, we can get a limit of 50 to 100 mA or more, depending on the specific transistors used.

Often small resistors (less than 1 ohm) are placed in series with the transistor emitters to limit the current drain in the event the output gets short-circuited to ground or to one of the available voltages. If so, they still have no apparent effect on the normal operation of the circuit, because the op amp will necessarily compensate for any voltage dropped across them. --- A Precision Half-Wave Rectifier

One of the non-linear behaviors that is sometimes required in analog circuits is rectification. Rectification is a process of separating the positive and negative portions of a waveform from each other and selecting from them what part of the signal to retain. In the case of half-wave rectification, we can choose to keep one polarity while discarding the other.

The circuit above accepts an incomimng waveform and as usual with op amps, inverts it. However, only the positive-going portions of the output waveform, which correspond to the negative-going portions of the input signal, actually reach the output. The direct feedback diode shunts any negative-going output back to the "-" input directly, preventing it from being reproduced. The slight voltage drop across the diode itself is blocked from the output by the second diode.

The second diode allows positive-going output voltage to reach the output. Furthermore, since the output voltage is taken from beyond the output diode itself, the op amp will necessarily compensate for any non-linear characteristics of the diode itself. As a result, the output voltage is a true and accurate (but inverted) reproduction of the negative portions of the input signal. Thus, this circuit operates as a precision half-wave rectifier. If Rf is equal to Rin as is the usual case, the output voltage will have the same amplitude as the input voltage.

If you want to keep the positive-going portion of the input signal instead of the negative-going portion, simply reverse the two diodes. The result will be a negative-going copy of the positive part of the input signal. --- A Precision Full-Wave Rectifier

The half-wave rectifier kept only those parts of the original input signal that were positive (or negative). Is there a way to keep both halves of the input signal, and yet render them both with the same output polarity? This is the behavior of a full-wave rectifier.

The circuit shown above performs full-wave rectification on the input signal, as shown. If you wish the final output to be positive instead of negative, simply reverse the two diodes in the half-wave rectifier section.

The full-wave rectifier depends on the fact that both the half-wave rectifier and the summing amplifier are precision circuits. It operates by producing an inverted half-wave-rectified signal and then adding that signal at double amplitude to the original signal in the summing amplifier. The result is a reversal of the selected polarity of the input signal.

The resistor values shown are reasonable; the resistors themselves must be of high precision in order to keep the rectification process accurate. If for some reason you must build such a circuit with a different set of resistance values, you must maintain the indicated 2:1 resistance ratio, and you must still use precision resistors in order to obtain accurate results. --- Comparators

What happens to an operational amplifier if the negative feedback is removed? With no feedback and very high gain, obviously the output voltage will go to one extreme limit or the other. Typically this is limited to just outside the �10 volt limit used in analog computers, and is inherently current-limited to avoid any possible damage. But is there really any use for such a circuit?

The circuit to the left shows the basic concept here. If Vin is positive, Vout will go full negative. For purposes of discussion, we will assume the output is limited by internal circuitry to �10 volts, so the output will be -10 volts whenever the input is positive by any significant amount. By the same token, Vout will become +10 volts whenever Vin goes negative.

As shown, this circuit operates as a zero crossing detector. That is, its output changes polarity whenever the input voltage crosses zero to change polarity. In the configuration shown, the output voltage polarity is opposite to the input polarity. However, the two inputs can be swapped, in which case Vout will have the same polarity as Vin.

If we re-introduce negative feedback, using a Zener diode such as the 1N751 (rated at 5.1 volts), we can limit the output voltage to the standard digital logic values of +5 volts (logic 1) and 0 volts (logic 0). Since we are using negative feedback here, the op amp must operate in inverting mode. The circuit to the right shows this configuration.

Again, this circuit operates as a zero-crossing detector, producing a True or logic 1 output whenever the input voltage goes negative. As such, it can also operate as a sign detector.

However, this circuit is still limited because it cannot detect any other input voltage than zero. In a wide range of situations, we would like to be able to detect whether or not the input is above (or below) some arbitrarily specified non-zero voltage. As shown, neither of these circuits can do that.

A more general comparison circuit is shown to the left. This circuit is a true comparator, in that it corrrectly indicates a voltage comparison between a reference voltage (Vref) and an unknown input voltage (Vin) at the other. As with the original zero crossing detector above, the two inputs may be swapped according to the desired sense of the output. The resistor and Zener diode in the output circuit convert the full-range output swing to digital levels, if that is desired. However, these components are not required for the basic voltage comparison.

Because this circuit effectively compares the two input voltages and produces a corresponding output, it is known as a comparator. Comparators find a wide range of applications in practical, commercial circuits. We'll see some useful applications of this basic concept on several of these pages. --- Digital to Analog Conversion

One common requirement in electronics is to convert signals back and forth between analog and digital forms. Most such conversions are ultimately based on a digital-to-analog converter circuit. Therefore, it is worth exploring just how we can convert a digital number that represents a voltage value into an actual analog voltage.

The circuit to the right is a basic digital-to-analog (D to A) converter. It assumes a 4-bit binary number in Binary-Coded Decimal (BCD) format, using +5 volts as a logic 1 and 0 volts as a logic 0. It will convert the applied BCD number to a matching (inverted) output voltage. The digits 1, 2, 4, and 8 refer to the relative weights assigned to each input. Thus, 1 is the Least Significant Bit (LSB) of the input binary number, and 8 is the Most Significant Bit (MSB).

If the input voltages are accurately 0 and +5 volts, then the "1" input will cause an output voltage of -5 � (4k/20k) = -5 � (1/5) = -1 volt whenever it is a logic 1. Similarly, the "2," "4," and "8" inputs will control output voltages of -2, -4, and -8 volts, respectively. As a result, the output voltage will take on one of 10 specific voltages, in accordance with the input BCD code.

Unfortunately, there are several practical problems with this circuit. First, most digital logic gates do not accurately produce 0 and +5 volts at their outputs. Therefore, the resulting analog voltages will be close, but not really accurate. In addition, the different input resistors will load the digital circuit outputs differently, which will almost certainly result in different voltages being applied to the summer inputs.

The circuit above performs D to A conversion a little differently. Typically the inputs are driven by CMOS gates, which have low but equal resistance for both logic 0 and logic 1. Also, if we use the same logic levels, CMOS gates really do provide +5 and 0 volts for their logic levels.

The input circuit is a remarkable design, known as an R-2R ladder network. It has several advantages over the basic summer circuit we saw first: Only two resistance values are used anywhere in the entire circuit. This means that only two values of precision resistance are needed, in a resistance ratio of 2:1. This requirement is easy to meet, and not especially expensive. The input resistance seen by each digital input is the same as for every other input. The actual impedance seen by each digital source gate is 3R. With a CMOS gate resistance of 200 ohms, we can use the very standard values of 10k and 20k for our resistors. The circuit is indefinitely extensible for binary numbers. Thus, if we use binary inputs instead of BCD, we can simply double the length of the ladder network for an 8-bit number (0 to 255) or double it again for a 16-bit number (0 to 65535). We only need to add two resistors for each additional binary input. The circuit lends itself to a non-inverting circuit configuration. Therefore we need not be concerned about intermediate inverters along the way. However, an inverting version can easily be configured if that is appropriate.

One detail about this circuit: Even if the input ladder is extended, the output will remain within the same output voltage limits. Additional input bits will simply allow the output to be subdivided into smaller increments for finer resolution. This is equivalent to adding inputs with ever-larger resistance values (doubling the resistance value for each bit), but still using the same two resistance values in the extended ladder.

The basic theory of the R-2R ladder network is actually quite simple. Current flowing through any input resistor (2R) encounters two possible paths at the far end. The effective resistances of both paths are the same (also 2R), so the incoming current splits equally along both paths. The half-current that flows back towards lower orders of magnitude does not reach the op amp, and therefore has no effect on the output voltage. The half that takes the path towards the op amp along the ladder can affect the output.

The most significant bit (marked "8" in the figure) sends half of its current toward the op amp, so that half of the input current flows through that final 2R resistance and generates a voltage drop across it. This voltage drop (from bit "8" only) will be one-third of the logic 1 voltage level, or 5/3 = 1.667 volts. This is amplified by the op amp, as controlled by the feedback and input resistors connected to the "-" input. For the components shown, this gain will be 3 (see the page on non-inverting amplifiers). With a gain of 3, the amplifier output voltage for the "8" input will be 5/3 � 3 = 5 volts.

The current from the "4" input will split in half in the same way. Then, the half going towards the op amp will encounter the junction from the "8" input. Again, this current "sees" two equal-resistance paths of 2R each, so it will split in half again. Thus, only a quarter of the current from the "4" will reach the op amp. Similarly, only 1/8 of the current from the "2" input will reach the op amp and be counted. This continues backwards for as many inputs as there are on the R-2R ladder structure.

The maximum output voltage from this circuit will be one step of the least significant bit below 10 volts. Thus, an 8-bit ladder can produce output voltages up to 9.961 volts (255/256 � 10 volts). This is fine for many applications. If you have an application that requires a 0-9 volt output from a BCD input, you can easily scale the output upwards using an amplifier with a gain of 1.6 (8/5).

If you want an inverting D to A converter, the circuit shown above will work well. You may need to scale the output voltage, depending on your requirements.

Also, it is possible to have a bipolar D to A converter. If you apply the most significant bit to an analog inverter and use that output for the MSB position of the R-2R ladder, the binary number applied to the ladder will be handled as a two's-complement number, going both positive and negative. --- Analog to Digital Conversion

To convert a digital code to an analog voltage, we only had to find a way to effectively assign an appropriate voltage to each bit, and then combine them. But is there some equally easy way of finding the digital code that corresponds to a given analog voltage?

Consider the very simple requirement to determine whether an analog voltage was closest to 0, 1, 2, or 3 volts. The result would be stored as a two-bit binary number. The first step in making this determination might be a set of three comparators, connected as shown to the right. As the analog voltage increases, the comparators will, one by one from the bottom up, change state from false to true. Of course, additional digital circuitry will be required to encode these signals into the corresponding digital number. But this circuit forms the sensing array that will determine directly which code will be closest to the actual analog voltage.

This approach will work, and can be expanded to any number of steps for finer resolution of the analog voltage. However, as you have probably already perceived, there is a problem with this approach, in that the number of comparators required increases exponentially with the number of binary bits used to store the code. Thus, using this approach to convert a 0 to 9-volt range to a BCD number will require nine comparators. A 4-bit binary number, counting from 0 to 15, requires 15 comparators. And a typical 8-bit circuit will require 255 comparators! Clearly this approach becomes rapidly too expensive for ordinary use, although it is practical if very high speed is required.

A slower but much less expensive approach involves the use of a D to A converter and a single comparator. The output voltage of the D to A converter is compared with the unknown analog voltage, then changed and compared again. We won't go into much detail about digital circuits here, but suppose a digital counter were to have its outputs applied to the D to A converter inputs. The counter would start at zero, and would begin counting upwards. At some point, the count would cause the output of the D to A converter to exceed the unknown analog voltage, thus causing the comparator output to change. The count that causes this to happen is taken as the digital code that most accurately represents the unknown analog voltage. --- A Square Wave Generator

One requirement in a wide range of applications is a spontaneous source of some continuous signal, having a regular and definable wave shape. One of the most important of these is a squarewave.

The circuit to the right uses a comparator with both positive and negative feedback to control its output voltage. Because the negative feedback path uses a capacitor while the positive feedback path does not, however, there is a time delay before the comparator is triggered to change state. As a result, the circuit oscillates, or keeps changing state back and forth at a predictable rate.

Because no effort is made to limit the output voltage, it will switch from one extreme to the other. If we assume it starts at -10 volts, then the voltage at the "+" input will be set by R2 and R1 to a fixed voltage equal to -10R1/(R1 + R2) volts. This then becomes the reference voltage for the comparator, and the output will remain unchanged until the "-" input becomes more negative than this value.

But the "-" input is connected to a capacitor (C) which is gradually charging in a negative direction through resistor Rf. Since C is charging towards -10 volts, but the reference voltage at the "+" input is necessarily smaller than the -10 volt limit, eventually the capacitor will charge to a voltage that exceeds the reference voltage. When that happens, the circuit will immediately change state. The output will become +10 volts and the reference voltge will abruptly become positive rather than negative. Now the capacitor will charge towards +10 volts, and the other half of the cycle will take place. The output frequency is given by the approximate equation:fout =

1

2RfC ln ( 2R1 + 1 )

R2

In practice, circuit values are chosen such that R1 is approximately Rf/3, and R2 is in the range of 2 to 10 times R1. --- Generating Triangle Waves

In the basic square wave generator circuit, a gradually-charging capacitor was used to help set the timing or frequency of the circuit. However, since it was only charging through a resistor, it necessarily charged on a logarithmic curve, rather than as a linear ramp. Can we use an op amp integrator here to obtain a linear triangle wave along with the square wave?

In the circuit to the right, we use a separate integrator to generate a ramp voltage from the generated square wave. As a result, we can get both waveforms from a single circuit. The phase relationship shown between the two output waveforms is correct � remember that the integrator inverts as well as integrating, so it will produce a negative-going ramp for a positive input voltage, and vice-versa.

Because we are now using an op amp integrator to get the triangle wave, we no longer have a logarithmic response anywhere in the circuit. Therefore, the equation for the operating frequency is simplified to:fout = 1 ( R2 )

4RtC R1

The squarewave amplitude is still the limit of voltage transistion, which we are assuming here to be �10 volts. The triangle wave's amplitude is set by the ratio of R1/R2. --- A Sine Wave Generator

One type of signal that is in frequent demand is the sine wave. Of course, we could use an op amp in place of a transistor as the gain element in a Wien Bridge oscillator or a Twin-T oscillator, but they have a problem with requiring multiple capacitors and resistors in some odd configurations for setting the frequency of oscillation. Can we do something with analog integrators and inverters to obtain the same result?

The circuit to the right implements the mathematical relationship between the sine and cosine trigonometric functions. Mathematically, if you integrate a sine wave, you get an inverted cosine wave. Basically, it's the same waveform but shifted 90� in phase. Then, if you integrate that cosine wave, you get another 90� phase shift, producing a negative sine wave. Of course, each op amp integrator introduces an inversion as well, so the output of the first integrator is actually a non-inverted cosine wave. This is reversed again by the second integrator, so its output is still a negative sine wave. All we have to do is invert that negative sine wave to get our original sine wave back again. The circuit to the right accomplishes this.

In this circuit, R1 is adjusted to ensure that oscillations start and to help set the output amplitude. The Zener diodes serve to limit the output signal amplitude by limiting the gain of the cosine amplifier beyond the desired level. This prevents the circuit from amplifying the signal beyond its �10 volt limits.

The clipping effect caused by the Zener diodes does introduce some distortion, but with a reasonable setting of R1 this effect is very slight, and the distortion it causes will be significantly reduced by the second integrator.

The oscillator circuit above is a classic, but does have its problems. Op amp offsets must be precisely balanced or they will accumulate on the two integrators and gradually damp out the oscillations. A better way is to redesign the circuit so that it will tend to balance its own offsets. Such a circuit is shown to the right.

This circuit lends itself nicely to a dual op amp such as the 1458. All three capacitors are the same, and R1 is made very slightly less than R to ensure that oscillations will start when power is applied. Under these conditions, the frequency of oscillation is f = 1/2RC. The maximum frequency of this type is determined by the frequency response of the op amps you use. Loop gain will decrease as frequency increases, and oscillations cannot be sustained if the loop gain is less than 1.

Because the loop gain of this circuit must be greater than 1 to maintain oscillations, this circuit will also tend to clip the output waveforms. However, the same double-Zener clipping circuit can be applied to the cosine integrator, to limit the signal amplitude and prevent either op amp from saturating.

With both sine and cosine waves available, this circuit is sometimes known as a quadrature oscillator. --- Characteristics of Operational Amplifiers

In analog computers and similar circuits, we make the assumption that the key component of the circuit � the operational amplifier � is perfect and ideal, with an infinite voltage gain and zero input current. Unfortunately, this is not possible in real-world devices. The questions we need to answer, then, are: how close can we come to the ideal, and how much error will be introduced into the results?

A very typical commercial IC op amp circuit is the 741. This IC has been available for many years, and a number of variations have been developed to help minimize the errors inherent in its construction and operation. Nevertheless, the analysis we will perform here using the 741 will apply to any other IC op amp, if you take into account the actual parameters of the device you are actually using. Therefore, we will use the 741 as our example IC op amp.

To the right is a circuit using the 741 op amp IC, with the input and feedback resistors that are required for this circuit to operate properly in an analog computer. Note that there are actually two inputs to the amplifier, designated "+" and "-" in the figure. This is because the 741, like all IC op amps of this type, is in fact a differential amplifier. Thus, the output voltage is determined by the difference between the two input voltages. The "+," or non-inverting input, is grounded through a resistor as shown. Thus, its input voltage is always zero. The "-," or inverting input, is the one that is actively used. Thus, we establish that the inverting input, which is also the junction of the input and feedback resistors, must operate as a virtual ground in order to keep the output voltage within bounds.

So far, so good, but what about the actual voltage gain? It can't possibly be infinite, and if it isn't infinite, there must be some non-zero input voltage to produce a non-zero output voltage. In fact, the typical open-loop voltage gain for the 741 is 200,000. This does not mean that every such device has a gain of 200,000, however. What is guaranteed is that the commercial version (the 741C) will have a minimum gain of 20,000. The military version is more stringently selected, and will have a minimum voltage gain of 50,000.

For the 741C, then, with a maximum output voltage of �10 volts, the maximum input voltage required at the inverting input can never be more than �10/20,000 = �0.0005 volt, or 0.5 millivolts. Typical measurement accuracy uses three significant digits, so we would measure voltages from 0.00 volts to �10.00 volts. The maximum input voltage is more than an order of magnitude smaller than this, and hence is insignificant in a typical analog computer.

But what about input bias current? Surely the IC requires at least some small amount of input current? Well, yes, it does. The 741C requires a typical input bias current of 80 nA (that's nanoAmperes, where 1 nA = 10-9 A). The maximum input bias current for the 741C is 500 nA, or 0.5 �A.

So how do we use this information to minimize the errors it could cause into insignificance? Well, let's consider the resistance that would be required for this current to cause a significant voltage drop. If we keep the voltage error small enough, we can ignore it as unmeasurable. This means we must keep the values of Rin and Rf as small as possible, consistent with proper operation of the circuit. At the same time, we cannot make them too small, or the op amp itself will be overloaded. For proper operation, the total load resistance at the 741 output should not be smaller than 2000 ohms, or 2k. This amounts to a maximum output current of 5 mA at 10 volts output.

This means that the output resistance of the op amp is not the desired zero ohms. However, as long as you don't draw too much current from the output, the use of heavy negative feedback has an added benefit: It makes the op amp behave as if it had zero output resistance. That is, any internal resistance will simply mean that the op amp must produce an internal voltage enough higher than the calculated value so that the final output voltage will be the calculated value.

So what if we make our input and feedback resistors about 10k each? Then the current demand on the output is only 1 mA at 10 volts, leaving plenty of capacity for additional inputs. And the voltage caused by the input bias current won't exceed 10,000 � 0.5 � 10-6 = 0.005 volt. This is half of the least significant digit of our measurement capability, which is not as good as we would like, but will do. Also, this is the absolute worst-case situation; most practical applications won't see an error this big.

In addition, the input bias current applies equally to both inputs. This is the reason for the resistor connecting the "+" input to ground. If this resistor is close in value to the parallel combination of Rin and Rf, the same voltage error will be generated at the two inputs, and will therefore be cancelled out, or very nearly. Thus, we can relegate this problem to true insignificance by means of correct circuit design and careful choice of component values.

The 741 does also have two error characteristics, called input offset voltage and input offset current, which define the inherent errors which may exist between the two inputs to the IC. However, the 741 also has the means for balancing these variations out, so the actual errors are minimized or eliminated, thus once again removing them from significance.

A problem with any op amp is a limited frequency response. The higher the gain of the complete circuit, the lower the working frequency response. This is one reason an overall gain of 20 is a practical limit. (Another reason is that the input and feedback resistors become too different from each other.) Also, the standard 741 has a slew rate of 0.5 v/�s. This means that the output voltage cannot change any faster than this. The newer generation of op amps, such as the 741S, have a slew rate more like 5 v/�s, and hence can operate over the entire audio range of frequencies without serious problems. --- Inside the 741 Op-Amp

The type 741 operational amplifier is the basic model for a wide range of commercial devices. Many different manufacturers produce similar or equivalent devices and they all have variations in their designations, but the digits "741" are part of the designation in most cases. We'll use the Signetics device, designated the �A741, as our example here.

The internal circuitry of the 741 op amp.

The numbers in parentheses at the external connections for the above schematic diagram refer to the terminal pinouts for the 8-pin IC package. The pin numbers are the same for both the 8-pin mini-DIP package and the 8-pin round Type-T metal can. In both cases, pin 8 has no connection.

There are a number of interesting points about this circuit. First, the input transistors are connected as npn emitter followers, feeding their outputs directly to a pair of pnp transistors configured as common-base amplifiers. This configuration isolates the inputs, preventing signal feedback that might otherwise have some harmful frequency-dependent effects.

Note the two pairs of transistors shown in red. One transistor in each pair has its collector connected to its base, as well as to the base of the other transistor. In addition, the transistor emitters are connected together, in this case to the V+ power source. In some diagrams, the transistor with the collector and base shorted together is rendered as a diode, which shows bias for the other transistor, but doesn't show the full value of this configuration.

This arrangement is known as a current mirror. The two transistors are manufactured side by side on the same silicon die, at the same time. Thus, they have essentially identical characteristics. The controlling transistor (on the left in each pair) will necessarily set its emitter-base voltage to exactly that value that will sustain the collector current it is carrying, even down to fractions of a millivolt. In so doing, it also sets the emitter-base voltage of the second transistor to the same value. Since the transistors are essentially identical, the second transistor will carry exactly the same current as the first, even to an independent circuit.

The use of a current mirror on the input circuit allows the inputs to accommodate large common-mode voltage swings without exceeding the active range of any transistor in the circuit. The second current mirror in red provides a constant-current active load for the output circuitry, again without regard for the actual output voltage.

A third current mirror, shown in blue, is a bit different. That 5K resistor in series with the emitter of the mirrored transistor limits its collector current to virtually nothing. Thus, it serves as a high-impedance connection to the negative power supply, providing a reference without loading the input circuit. This particular circuit is therefore able to provide the slight base bias current needed for the PNP transistors in the differential input circuit, while allowing those transistors to operate correctly over a wide common-mode input voltage range.

The final odd circuit within the op amp is shown in green. Here, the two resistors bias the transistor in what would seem to be an unusual way, since there is no apparent signal input to the base of the transistor. To understand its purpose, assume zero base current for a moment, and a VBE of 0.625 volt. Ohm's Law then requires a current of 0.625 � 7.5K = 0.0833mA through the 7.5K resistor. The same current must also flow through the 4.5K resistor, which will therefore exhibit a voltage drop of 0.0833mA � 4.5K = 0.375V. The total voltage across the two resistors, then, and therefore across the transistor, is 0.625V + 0.375V = 1.0V. This, then, is a simple voltage reference, providing an internal 1-volt difference without a connection to either power supply, nor to ground. This circuit floats internally, and provides its 1-volt bias regardless of the actual dc output voltage of the overall circuit.

The offset null connections (pins 1 and 5) provide a simple way to balance out the internal variations and zero out the output offset which might be apparent with zero input voltage. It is used simply by connecting a trimmer potentiometer between pins 1 and 5, as shown to the right. The slider on the potentiometer is connected to the negative power supply. To adjust for zero offset, ground the input resistor and use the offset null potentiometer to set the output voltage precisely to zero.

The offset null terminals are not available in packages such as the 5558 and 1458, which put two independent op amps in a single 8-pin mini-DIP package. ---

Noise

6.1	Maxwell's Equations
6.2	Device Noise
6.3	Conducted Noise
6.4	Radiated Noise
6.5	Ott's Design Guidelines

Digital

Digital Circuitry Basics

1.1	Introduction and Basics

1.1.1 Logic 1.1.2 DeMorgans Theorem 1.1.3 Reduction

Sampling Theory

1.2.1 Nyquist Theorem 1.2.2 Shannon's Reconstruction Theorem

Digital Signal Processing

Digital Notes

operators are described here. And, Or and Invert are fundamental. Nand, Nor, Xor and Xnor are derived. Nand and Nor are easy in hardware. Xor and Xnor are useful in arithmetic circuits. And/Nand - The And function outputs a one whenever all inputs are one. Nand is the complement of And. A B A * B 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 Or - The Or function outputs a one whenever any input is one. A B A + B 0 0 0 1 0 1 1 0 1 0 1 0 1 1 1 0 Invert - The invert function outputs a one whenever its input is zero. A 0 1 1 0 Xor/Xnor (exclusive or/nor) - The Xor function outputs a one whenever one and only one input is one. Xnor is the complement of Xor. A B 0 0 0 1 0 1 1 0 1 0 1 0 1 1 0 1 Postulates - The following are two of the primary Boolean algebra postulates. Care should be taken with semantics here. Boolean algebra, while similar to mathematic algebra in ways, is not identical in its definitions. For example, the Distributive property of Boolean algebra listed here doesn�t match the distributive property of mathematical algebra. It is important to keep in mind that the �+� and �*�symbols have fundamentally different meanings in Boolean and math-ematic algebra and therefore must be treated differently in some cases. Commutative - A+B = B+A EQ XXX A*B = B*A EQ XXX Associative - (A+B)+C = A+(B+C) EQ XXX (A*B)*C = A*(B*C) EQ XXX Theorems - The following are useful and provable from the postulates. Distributive - A*(B+C) = (A*B)+(A*C) EQ XXX A+(B*C) = (A+B)*(A+C) EQ XXX DeMorgan�s Theorem � EQ XXX EQ XXX

http://www.play-hookey.com/digital/ --- Digital Logic

New, due to popular request! I have received a number of questions regarding the internal structure and operation of logic gates. This is not as simple as it may seem, because there are many different ways to implement logical functions electronically. Therefore, I am now adding some new pages on the major logic families and their internal operation.

I've also had some requests regarding building and demonstrating actual circuits to perform logical functions. If you'd like to get some hands-on experience, I've set up a series of pages on breadboarding logic circuits to demonstrate their operation. If these prove as popular as I expect, I will add to the list soon.

Digital or binary logic has fascinated many people over the years. The very idea that a two-valued number system can possibly be the basis for the most powerful and sophisticated computers seems astounding, to say the least. Nevertheless, it is so, and the how and the why of this requires some explanation.

Everything in the digital world is based on the binary number system. Numerically, this involves only two symbols: 0 and 1. Logically, we can use these symbols or we can equate them with others according to the needs of the moment. Thus, when dealing with digital logic, we can specify that:

0 = false = no 1 = true = yes

Using this two-valued logic system, every statement or condition must be either "true" or "false;" it cannot be partly true and partly false. While this approach may seem limited, it actually works quite nicely, and can be expanded to express very complex relationships and interactions among any number of individual conditions.

One essential reason for basing logical operations on the binary number system is that it is easy to design simple, stable electronic circuits that can switch back and forth between two clearly-defined states, with no ambiguity attached. It is also readily possible to design and build circuits that will remain indefinitely in one state unless and until they are deliberately switched to the other state. This makes it possible to construct a machine (the computer) which can remember sequences of events and adjust its behavior accordingly.

Digital logic may be divided into two classes: combinational logic, in which the logical outputs are determined by the logical function being performed and the logical input states at that particular moment; and sequential logic, in which the outputs also depend on the prior states of those outputs. Both classes of logic are used extensively in all digital computers.

Since both types of logic circuits begin with logic gates to combine logical input signals in various ways to produce the desired outputs, we will begin on the next page by seeing how the basic logic gates work.

Note: the demonstrations on these pages are made interactive with Javascript 1.1, as implemented in Netscape 3.0. Netscape 4 and higher, and IE4 and higher, remain compatible. If you are using a browser without Javascript, or if you have Javascript disabled for any reason, you will be able to see static images, but you will not be able to interact with them. If your browser recognizes some Javascript functions but not the ones used here, you may get an error message. If so, simply click the "OK" button and continue; you will also be limited to the static display, but you will still be able to view the page. --- Basic Logical Functions and Gates

While each logical element or condition must always have a logic value of either "0" or "1", we also need to have ways to combine different logical signals or conditions to provide a logical result.

For example, consider the logical statement: "If I move the switch on the wall up, the light will turn on." At first glance, this seems to be a correct statement. However, if we look at a few other factors, we realize that there's more to it than this. In this example, a more complete statement would be: "If I move the switch on the wall up and the light bulb is good and the power is on, the light will turn on."

If we look at these two statements as logical expressions and use logical terminology, we can reduce the first statement to:

Light = Switch

This means nothing more than that the light will follow the action of the switch, so that when the switch is up/on/true/1 the light will also be on/true/1. Conversely, if the switch is down/off/false/0 the light will also be off/false/0.

Looking at the second version of the statement, we have a slightly more complex expression:

Light = Switch and Bulb and Power

Normally, we use symbols rather than words to designate the and function that we're using to combine the separate variables of Switch, Bulb, and Power in this expression. The symbol normally used is a dot, which is the same symbol used for multiplication in some mathematical expressions. Using this symbol, our three-variable expression becomes:

Light = Switch Bulb Power

When we deal with logical circuits (as in computers), we not only need to deal with logical functions; we also need some special symbols to denote these functions in a logical diagram. There are three fundamental logical operations, from which all other functions, no matter how complex, can be derived. These functions are named and, or, and not. Each of these has a specific symbol and a clearly-defined behavior, as follows:

The AND Gate

The AND gate implements the AND function. With the gate shown to the left, both inputs must have logic 1 signals applied to them in order for the output to be a logic 1. With either input at logic 0, the output will be held to logic 0.

If your browser supports the Javascript functions required for the demonstrations built into this page, you can click the buttons to the left of the AND gate drawing to change their assigned logic values, and the drawing will change to reflect the new input states. Other demonstrations on these pages will work the same way.

There is no limit to the number of inputs that may be applied to an AND function, so there is no functional limit to the number of inputs an AND gate may have. However, for practical reasons, commercial AND gates are most commonly manufactured with 2, 3, or 4 inputs. A standard Integrated Circuit (IC) package contains 14 or 16 pins, for practical size and handling. A standard 14-pin package can contain four 2-input gates, three 3-input gates, or two 4-input gates, and still have room for two pins for power supply connections.

The OR Gate

The OR gate is sort of the reverse of the AND gate. The OR function, like its verbal counterpart, allows the output to be true (logic 1) if any one or more of its inputs are true. Verbally, we might say, "If it is raining OR if I turn on the sprinkler, the lawn will be wet." Note that the lawn will still be wet if the sprinkler is on and it is also raining. This is correctly reflected by the basic OR function.

In symbols, the OR function is designated with a plus sign (+). In logical diagrams, the symbol to the left designates the OR gate.

As with the AND function, the OR function can have any number of inputs. However, practical commercial OR gates are mostly limited to 2, 3, and 4 inputs, as with AND gates.

The NOT Gate, or Inverter

The inverter is a little different from AND and OR gates in that it always has exactly one input as well as one output. Whatever logical state is applied to the input, the opposite state will appear at the output.

The NOT function, as it is called, is necesasary in many applications and highly useful in others. A practical verbal application might be:

The door is NOT locked = You may enter

The NOT function is denoted by a horizontal bar over the value to be inverted, as shown in the figure to the left. In some cases a single quote mark (') may also be used for this purpose: 0' = 1 and 1' = 0. For greater clarity in some logical expressions, we will use the overbar most of the time.

In the inverter symbol, the triangle actually denotes only an amplifier, which in digital terms means that it "cleans up" the signal but does not change its logical sense. It is the circle at the output which denotes the logical inversion. The circle could have been placed at the input instead, and the logical meaning would still be the same.

The logic gates shown above are used in various combinations to perform tasks of any level of complexity. Some functions are so commonly used that they have been given symbols of their own, and are often packaged so as to provide that specific function directly. On the next page, we'll begin our coverage of these functions. --- Derived Logical Functions and Gates

While the three basic functions AND, OR, and NOT are sufficient to accomplish all possible logical functions and operations, some combinations are used so commonly that they have been given names and logic symbols of their own.

We will discuss three of these on this page. The first is called NAND, and consists of an AND function followed by a NOT function. The second, as you might expect, is called NOR. This is an OR function followed by NOT. The third is a variation of the OR function, called the Exclusive-OR, or XOR function. As with the three basic logic functions, each of these derived functions has a specific logic symbol and behavior, which we can summarize as follows:

The NAND Gate

The NAND gate implements the NAND function, which is exactly inverted from the AND function you already examined. With the gate shown to the left, both inputs must have logic 1 signals applied to them in order for the output to be a logic 0. With either input at logic 0, the output will be held to logic 1.

The circle at the output of the NAND gate denotes the logical inversion, just as it did at the output of the inverter. Also in the figure to the left, note that the overbar is a solid bar over both input values at once. This shows that it is the AND function itself that is inverted, rather than each separate input.

As with AND, there is no limit to the number of inputs that may be applied to a NAND function, so there is no functional limit to the number of inputs a NAND gate may have. However, for practical reasons, commercial NAND gates are most commonly manufactured with 2, 3, or 4 inputs, to fit in a 14-pin or 16-pin package.

The NOR Gate

The NOR gate is an OR gate with the output inverted. Where the OR gate allows the output to be true (logic 1) if any one or more of its inputs are true, the NOR gate inverts this and forces the output to logic 0 when any input is true.

In symbols, the NOR function is designated with a plus sign (+), with an overbar over the entire expression to indicate the inversion. In logical diagrams, the symbol to the left designates the NOR gate. As expected, this is an OR gate with a circle to designate the inversion.

The NOR function can have any number of inputs, but practical commercial NOR gates are mostly limited to 2, 3, and 4 inputs, as with other gates in this class, to fit in standard IC packages.

The Exclusive-OR, or XOR Gate

The Exclusive-OR, or XOR function is an interesting and useful variation on the basic OR function. Verbally, it can be stated as, "Either A or B, but not both." The XOR gate produces a logic 1 output only if its two inputs are different. If the inputs are the same, the output is a logic 0.

The XOR symbol is a variation on the standard OR symbol. It consists of a plus (+) sign with a circle around it. The logic symbol, as shown here, is a variation on the standard OR symbol.

Unlike standard OR/NOR and AND/NAND functions, the XOR function always has exactly two inputs, and commercially manufactured XOR gates are the same. Four XOR gates fit in a standard 14-pin IC package.

The three derived functions shown above are by no means the only ones, but these form the basis of all the others. On the next page we will look at how the XOR function is derived. Then we will begin our look at practical applications for logic gates in various combinations, to see just how these simple gates can be combined to perform every possible operation in a computer. --- Deriving the XOR Function

On the previous page we stated that the Exclusive-OR, or XOR function can be described verbally as, "Either A or B, but not both." In the realm of digital logic there are several ways of stating this in a more detailed and precise format. We won't go here into such devices as Truth tables and graphic representations. We will stick with the more complete verbal statement, "NOT A and B, or A and NOT B."

The circuit required to implement this description is shown below:

The practical problem with the circuit above is that it contains three different kinds of gates: AND, OR, and NOT. While this illustrates a practical application using all three of the basic gate types, it is cumbersome to construct on a printed circuit board.

There are commercial packages which contain four XOR gates, but often only a single XOR function is wanted in a given application. What is also wanted is a way to create that function with a single IC package.

This can easily be done with a single quad two-input NAND gate, as shown in the circuit below:

There are many ways in which the simple logic gates we have examined can be combined to perform useful functions. Some of these circuits produce outputs which are only dependent upon the current logic states of all inputs. These are called combinational logic circuits. Other circuits are designed to actually remember the past states of their inputs, and to produce outputs based on those past signals as well as the current states of their inputs. These circuits can act in accordance with a sequence of input signals, and are therefore known as sequential logic circuits.

In these pages, we will look first at combinational circuits. Then we will move on to sequential circuits. If you wish to skip immediately to sequential circuits, use the navigational links at the top of this page to select the type of circuit you would like to examine. --- Adding Binary Numbers

A key requirement of digital computers is the ability to use logical functions to perform arithmetic operations. The basis of this is addition; if we can add two binary numbers, we can just as easily subtract them, or get a little fancier and perform multiplication and division. How, then, do we add two binary numbers?

Let's start by adding two binary bits. Since each bit has only two possible values, 0 or 1, there are only four possible combinations of inputs. These four possibilities, and the resulting sums, are:

    0 + 0 =  0
    0 + 1 =  1
    1 + 0 =  1
    1 + 1 = 10

Whoops! That fourth line indicates that we have to account for two output bits when we add two input bits: the sum and a possible carry. Let's set this up as a truth table with two inputs and two outputs, and see where we can go from there.INPUTS OUTPUTS Well, this looks familiar, doesn't it? The Carry output is a simple AND function, and the Sum is an Exclusive-OR. Thus, we can use two gates to add these two bits together. The resulting circuit is shown below. A B CARRY SUM 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

OK, we've got a good start on this circuit. However, we're not done yet. In a computer, we'll have to add multi-bit numbers together. If each pair of bits can produce an output carry, it must also be able to recognize and include a carry from the next lower order of magnitude. This is the same requirement as adding decimal numbers -- if you have a carry from one column to the next, the next column has to include that carry. We have to do the same thing with binary numbers, for the same reason. As a result, the circuit to the left is known as a "half adder," because it only does half of the job. We need a circuit that will do the entire job.

To construct a full adder circuit, we'll need three inputs and two outputs. Since we'll have both an input carry and an output carry, we'll designate them as CIN and COUT. At the same time, we'll use S to designate the final Sum output. The resulting truth table is shown to the right.

Hmmm. This is looking a bit messy. It looks as if COUT may be either an AND or an OR function, depending on the value of A, and S is either an XOR or an XNOR, again depending on the value of A. Looking a little more closely, however, we can note that the S output is actually an XOR between the A input and the half-adder SUM output with B and CIN inputs. Also, the output carry will be true if any two or all three inputs are logic 1.

What this suggests is also intuitively logical: we can use two half-adder circuits. The first will add A and B to produce a partial Sum, while the second will add CIN to that Sum to produce the final S output. If either half-adder produces a carry, there will be an output carry. Thus, COUT will be an OR function of the half-adder Carry outputs. The resulting full adder circuit is shown below. INPUTS OUTPUTS A B CIN COUT S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

The circuit above is really too complicated to be used in larger logic diagrams, so a separate symbol, shown to the right, is used to represent a one-bit full adder. In fact, it is common practice in logic diagrams to represent any complex function as a "black box" with input and output signals designated. It is, after all, the logical function that is important, not the exact method of performing that function.

Now we can add two binary bits together, accounting for a possible carry from the next lower order of magnitude, and sending a carry to the next higher order of magnitude. To perform multibit addition the way a computer would, a full adder must be allocated for each bit to be added simultaneously. Thus, to add two 4-bit numbers to produce a 4-bit sum (with a possible carry), you would need four full adders with carry lines cascaded, as shown to the right. For two 8-bit numbers, you would need eight full adders, which can be formed by cascading two of these 4-bit blocks. By extension, two binary numbers of any size may be added in this manner.

It is also quite possible to use this circuit for binary subtraction. If a negative number is applied to the B inputs, the resulting sum will actually be the difference between the two numbers. We'll look at this subject in more detail in the page on Negative Numbers and Binary Subtraction.

In a modern computer, the adder circuitry will include the means of negating one of the input numbers directly, so the circuit can perform either addition or subtraction on demand. Other functions are commonly included in modern implementations of the adder circuit, especially in modern microprocessors. --- Negative Numbers and Binary Subtraction

We have seen how simple logic gates can perform the process of binary addition. It is only logical to assume that a similar circuit could perform binary subtraction.

If we look at the possibilites involved in subtracting one 1-bit number from another, we can quickly see that three of the four possible combinations are easy and straight-forward. The fourth one involves a bit more:

   0 - 0 = 0
   1 - 0 = 1
   1 - 1 = 0
   0 - 1 = 1, with a borrow bit.

That borrow bit is just like a borrow in decimal subtraction: it subtracts from the next higher order of magnitude in the overall number. Let's see what the truth table looks like.INPUTS OUTPUTS This is an interesting result. The difference, A-B, is still an Exclusive-OR function, just as the sum was for addition. The borrow is still an AND function, but is A'B instead of AB.

What we'd like to do, now, is find an easy way to use the binary adder to perform subtraction as well. We already have half of it working: the difference output. Can we simply invert the A input so the AND gate will have the right signals? No, we can't, because that would invert the sense of the Exclusive-OR function.

What would be really nice is to convert B to the negative equivalent of its value, and then use the basic adder just as it stands. To see if we can do that, let's consider negative binary numbers below. A B BORROW A - B 0 0 0 0 0 1 1 1 1 0 0 1 1 1 0 0

As we discovered when looking at binary counters, once a full count is obtained, the next clock pulse will cause the counter to read zero again. Likewise if we set up a counter to count backwards, the first clock pulse will cause the count to go from all zeroes to all ones. Thinking along these lines, we can see that the binary number 1111 might represent the decimal number 15, or it could represent the number -1.

On the right is the counting sequence for a 4-bit binary number, with decimal equivalents expressed in two ways. First we have the unsigned counting sequence, where all numbers are assumed to be positive. Then we see the signed sequence, which includes both positive and negative numbers.

Looking at the two decimal counting sequences, we note two factors right away: The positive signed numbers are the same as their unsigned counterparts. Negative signed numbers all correspond to the most significant bit of the binary number being a logic 1.

Because positive numbers are the same in both sequences, they can be used together without difficulty. We only need to keep track of how we want to define the system. And the fact that negative numbers all have the binary MSB = 1 is helpful because the MSB can immediately be used to identify the sign of the number. Indeed, the binary MSB is commonly known as the sign bit. The use of this bit to distinguish between positive and negative numbers also allows us to divide the counting sequence evenly between positive and negative numbers.

Now we need to look at the relationship between the binary numbers for positive and negative versions of the same magnitude. Suppose we invert each bit of 0001 (+1) to get 1110 (-2). If we then increment the result, we get 1111 (-1), which is what we wanted. Will this relationship hold for all negative numbers?

In fact, it does work, as you can determine for yourself. To form the negative of any number, first complement all bits of the number. The result is the one's complement of the original number. Then, add 1 to the result, thus forming the two's complement of the original number. Arithmetic involving such signed numbers is known generally as two's complement arithmetic.

To check the validity of this process, let's take the two's complement of 0. We should logically get a result of 0. So, we start with 0000, and form the one's complement (1111). Now add 1 to the result (10000). But this won't fit in a 4-bit number, so the extra 1-bit is lost, leaving a result of (0000). Sure enough, -0 = 0, as it should. Remember to discard the carry from the highest-order bit. Two's complement arithmetic always works this way.

Note: It is not possible to represent +8 as a 4-bit signed number. Therefore it is not possible to correctly take the two's complement of -8. It will come back again as -8. Binary Unsigned Decimal Signed Decimal 0000 0 0 0001 1 1 0010 2 2 0011 3 3 0100 4 4 0101 5 5 0110 6 6 0111 7 7 1000 8 -8 1001 9 -7 1010 10 -6 1011 11 -5 1100 12 -4 1101 13 -3 1110 14 -2 1111 15 -1

Now that we have an easy way to obtain the negative of any number, we can convert our original 4-bit adder circuit to an adder/subtractor. By leaving the inputs unchanged, we get the result of A + B. But if we invert B and add 1 with the low-order Cin, we get the result of A - B.

We can use Exclusive-OR gates, as shown to the right, to control whether we will add or subtract on any given occasion. With a control input of 0, the XOR gates will leave the B input number unchanged, and will also apply a logic 0 as the initial input carry. This is exactly what we want in order to add the two numbers. However, if we apply a logic 1 to the control input, the XOR gates will invert the B input number to form its one's complement, and will also add 1 through the initial input carry. This changes B to its two's complement. Thus, the output result will actually be A - B. (Note that in two's complement addition, the output carry is ignored. You can also think of it as an inverted "borrow" bit rather than as a carry, so that a carry of 1 corresponds to a borrow of 0. That logic also holds for the input carry, which also represents an input borrow bit of 0.)

When we add or subtract signed numbers, we need to introduce a new concept: overflow. Overflow occurs when the result has the wrong sign bit for the operation that was performed. For example, if we add two positive numbers (7 and 6), we should get a positive result (13). However, using 4-bit binary numbers, we would add 0111 to 0110 and get 1101 as the result. In signed notation, this is a result of -3, not +13. Therefore, an overflow has occurred, where the result would have to have more bits than the original two numbers.

This is not as much of a problem as you might think. An 8-bit number can have signed values in the range -128 to +127. A 16-bit signed number may hold any value from -32,768 to +32,767. These ranges are sufficient for most practical applications. Where they are not, modern computers can easily use 32-bit numbers (�2.14 � 109) or 64-bit numbers (�9.22 � 1018) for the purpose.

If we add a positive number to a negative number, overflow cannot occur. Likewise, if we are subtracting two numbers of the same sign, overflow is impossible. But if we add like-signed numbers or subtract unlike-signed numbers, we must be aware of the possibility of overflow, and recognize when it occurs.

Modern microprocessors are designed to recognize and report when overflow occurs in any arithmetic operation.

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The Two-Input Multiplexer

One circuit I've received a number of requests for is the multiplexer circuit. This is a digital circuit with multiple signal inputs, one of which is selected by separate address inputs to be sent to the single output. It's not easy to describe without the logic diagram, but is easy to understand when the diagram is available.

A two-input multiplexer is shown below.

The multiplexer circuit is typically used to combine two or more digital signals onto a single line, by placing them there at different times. Technically, this is known as time-division multiplexing.

Input A is the addressing input, which controls which of the two data inputs, X0 or X1, will be transmitted to the output. If the A input switches back and forth at a frequency more than double the frequency of either digital signal, both signals will be accurately reproduced, and can be separated again by a demultiplexer circuit synchronized to the multiplexer.

This is not as difficult as it may seem at first glance; the telephone network combines multiple audio signals onto a single pair of wires using exactly this technique, and is readily able to separate many telephone conversations so that everyone's voice goes only to the intended recipient. With the growth of the Internet and the World Wide Web, most people have heard about T1 telephone lines. A T1 line can transmit up to 24 individual telephone conversations by multiplexing them in this manner.

A very common application for this type of circuit is found in computers, where dynamic memory uses the same address lines for both row and column addressing. A set of multiplexers is used to first select the row address to the memory, then switch to the column address. This scheme allows large amounts of memory to be incorporated into the computer while limiting the number of copper traces required to connect that memory to the rest of the computer circuitry. In such an application, this circuit is commonly called a data selector.

Multiplexers are not limited to two data inputs. If we use two addressing inputs, we can multiplex up to four data signals. With three addressing inputs, we can multiplex eight signals. If you would like to see a demonstration of a four-input multiplexer, you can follow this link. This demonstration requires 64 separate images, each approximately 4K bytes in size, so it will take a little while to load. For this reason, it is not included in the list of digital pages at the top of each page. An eight-input multiplexer would require either 2048 separate images or a rather complex implementation of dynamic HTML; therefore it will not be included on these pages. --- The opposite of the multiplexer circuit, logically enough, is the demultiplexer. This circuit takes a single data input and one or more address inputs, and selects which of multiple outputs will receive the input signal. The same circuit can also be used as a decoder, by using the address inputs as a binary number and producing an output signal on the single output that matches the binary address input. In this application, the data input line functions as a circuit enabler � if the circuit is disabled, no output will show activity regardless of the binary input number.

A one-line to two-line decoder/demultiplexer is shown below.

This circuit uses the same AND gates and the same addressing scheme as the two-input multiplexer circuit shown in these pages. The basic difference is that it is the inputs that are combined and the outputs that are separate. By making this change, we get a circuit that is the inverse of the two-input multiplexer. If you were to construct both circuits on a single breadboard, connect the multiplexer output to the data IN of the demultiplexer, and drive the (A)ddress inputs of both circuits with the same signal, you would find that the initial X0 input would be transmitted to OUT0 and the X1 input would reach only OUT1.

The one problem with this arrangement is that one of the two outputs will be inactive while the other is active. To retain the output signal, we need to add a latch circuit that can follow the data signal while it's active, but will hold the last signal state while the other data signal is active. An excellent circuit for this is the D (or Data) Latch. By placing a latch after each output and using the Addressing input (or its inverse) to control them, we can maintain both output signals at all times. If the Address input changes much more rapidly than the data inputs, the output signals will match the inputs faithfully.

Like multiplexers, demultiplexers are not limited to two data signals. If we use two addressing inputs, we can demultiplex up to four data signals. With three addressing inputs, we can demultiplex eight signals. The demonstration of the 2-to-4 line decoder/demultiplexer is much smaller than the demo for the four-input multiplexer, because it has fewer independent input signals. With one data input and two addressing inputs, the decoder/demultiplexer only needs 8 images for the full demonstration. --- Boolean Algebra

One of the primary requirements when dealing with digital circuits is to find ways to make them as simple as possible. This constantly requires that complex logical expressions be reduced to simpler expressions that nevertheless produce the same results under all possible conditions. The simpler expression can then be implemented with a smaller, simpler circuit, which in turn saves the price of the unnecessary gates, reduces the number of gates needed, and reduces the power and the amount of space required by those gates.

One tool to reduce logical expressions is the mathematics of logical expressions, introduced by George Boole in 1854 and known today as Boolean Algebra. The rules of Boolean Algebra are simple and straight-forward, and can be applied to any logical expression. The resulting reduced expression can then be readily tested with a Truth Table, to verify that the reduction was valid.

The rules of Boolean Algebra are:.

AND Operations (�) 0�0 = 0 A�0 = 0 1�0 = 0 A�1 = A 0�1 = 0 A�A = A 1�1 = 1 A�A' = 0 OR Operations (+) 0+0 = 0 A+0 = A 1+0 = 1 A+1 = 1 0+1 = 1 A+A = A 1+1 = 1 A+A' = 1 NOT Operations (') 0' = 1 A = A 1' = 0

Associative Law (A�B)�C = A�(B�C) = A�B�C (A+B)+C = A+(B+C) = A+B+C Distributive Law A�(B+C) = (A�B) + (A�C) A+(B�C) = (A+B) � (A+C) Commutative Law A�B = B�A A+B = B+A Precedence AB = A�B A�B+C = (A�B) + C A+B�C = A + (B�C)

DeMorgan's Theorem (A�B)' = A' + B' (NAND) (A+B)' = A' � B' (NOR) --- The Basic RS NAND Latch

In order for a logical circuit to "remember" and retain its logical state even after the controlling input signal(s) have been removed, it is necessary for the circuit to include some form of feedback. We might start with a pair of inverters, each having its input connected to the other's output. The two outputs will always have opposite logic levels.

The problem with this is that we don't have any additional inputs that we can use to change the logic states if we want. We can solve this problem by replacing the inverters with NAND or NOR gates, and using the extra input lines to control the circuit.

The circuit shown below is a basic NAND latch. The inputs are generally designated "S" and "R" for "Set" and "Reset" respectively. Because the NAND inputs must normally be logic 1 to avoid affecting the latching action, the inputs are considered to be inverted in this circuit.

The outputs of any single-bit latch or memory are traditionally designated Q and Q'. In a commercial latch circuit, either or both of these may be available for use by other circuits. In any case, the circuit itself is:

For the NAND latch circuit, both inputs should normally be at a logic 1 level. Changing an input to a logic 0 level will force that output to a logic 1. The same logic 1 will also be applied to the second input of the other NAND gate, allowing that output to fall to a logic 0 level. This in turn feeds back to the second input of the original gate, forcing its output to remain at logic 1.

Applying another logic 0 input to the same gate will have no further effect on this circuit. However, applying a logic 0 to the other gate will cause the same reaction in the other direction, thus changing the state of the latch circuit the other way.

Note that it is forbidden to have both inputs at a logic 0 level at the same time. That state will force both outputs to a logic 1, overriding the feedback latching action. In this condition, whichever input goes to logic 1 first will lose control, while the other input (still at logic 0) controls the resulting state of the latch. If both inputs go to logic 1 simultaneously, the result is a "race" condition, and the final state of the latch cannot be determined ahead of time.

This circuit has quite a number of limitations, and can be improved in many ways as you'll see shortly. However, it does have a very practical application almost without changes. Any mechanical switch experiences a phenomenon called "contact bounce." Whenever you press the button or change the switch position, the physical contacts will flex a little, causing them to make and break several times before settling down. You don't notice this when turning on a light in your home, but digital circuits are fast enough that they do notice this behavior and transmit it faithfully. If you are trying to test a new digital circuit by sending it one clock pulse at a time, this will cause all sorts of headaches.

The solution is to use an SPDT (Single-Pole, Double-Throw) pushbutton or switch, as shown in the figure to the right. Normally, the switch is of the break-before-make type, so there will be some part of the switch motion when all three contacts are disconnected from each other. Now, the unconnected input is held at a logic 1 through its resistor (an electronic component that allows an electrical connection without causing a dead short), while the connected input is held at logic 0 by the direct connection through the switch.

When the switch is moved to the other setting or the button is pressed, the very first contact will cause the latch to change state, but additional bounces will have no further effect. This eliminates the contact bounce and sends a single, clean digital transition to the next circuit. All of the interactive digital demonstrations behave in a debounced fashion, and would use this type of circuit if constructed physically.

One problem with the basic RS NAND latch is that the input levels need to be inverted, sitting idle at logic 1, in order for the circuit to work. It would be helpful, as well as more intuitive, if we had normal inputs which would idle at logic 0, and go to logic 1 only to control the latch. This much we can do simply by placing inverters at the inputs.

However, there is another problem we need to address: How to control when the latch is allowed to change state, and when it is not. This is necessary if we have a group of latches and want to be sure they all change state (or not) at the same time. We'll see how both of these concerns can be easily addressed on the next page. --- The Basic RS NOR Latch

While most of our demonstration circuits use NAND gates, the same functions can also be performed using NOR gates. A few adjustments must be made to allow for the difference in the logic function, but the logic involved is quite similar.

The circuit shown below is a basic NOR latch. The inputs are generally designated "S" and "R" for "Set" and "Reset" respectively. Because the NOR inputs must normally be logic 0 to avoid overriding the latching action, the inputs are not inverted in this circuit. The NOR-based latch circuit is:

For the NOR latch circuit, both inputs should normally be at a logic 0 level. Changing an input to a logic 1 level will force that output to a logic 0. The same logic 0 will also be applied to the second input of the other NOR gate, allowing that output to rise to a logic 1 level. This in turn feeds back to the second input of the original gate, forcing its output to remain at logic 0 even after the external input is removed.

Applying another logic 1 input to the same gate will have no further effect on this circuit. However, applying a logic 1 to the other gate will cause the same reaction in the other direction, thus changing the state of the latch circuit the other way.

Note that it is forbidden to have both inputs at a logic 1 level at the same time. That state will force both outputs to a logic 0, overriding the feedback latching action. In this condition, whichever input goes to logic 0 first will lose control, while the other input (still at logic 1) controls the resulting state of the latch. If both inputs go to logic 0 simultaneously, the result is a "race" condition, and the final state of the latch cannot be determined ahead of time.

One problem with the basic RS NOR latch is that the input signals actively drive their respective outputs to a logic 0, rather than to a logic 1. Thus, the S input signal is applied to the gate that produces the Q' output, while the R input signal is applied to the gate that produces the Q output. The circuit works fine, but this reversal of inputs can be confusing when you first try to deal with NOR-based circuits. ?--- The Clocked RS NAND Latch

By adding a pair of NAND gates to the input circuits of the RS latch, we accomplish two goals: normal rather than inverted inputs, and a third input common to both gates which we can use to synchronize this circuit with others of its kind.

The clocked RS NAND latch is shown below.

The clocked RS latch circuit is very similar in operation to the basic latch you examined on the previous page. The S and R inputs are normally at logic 0, and must be changed to logic 1 to change the state of the latch. However, with the third input, a new factor has been added. This input is typically designated C or CLK, because it is typically controlled by a clock circuit of some sort, which is used to synchronize several of these latch circuits with each other. The output can only change state while the CLK input is a logic 1. When CLK is a logic 0, the S and R inputs will have no effect.

The same rule about not activating both the S and R inputs simultaneously holds true: if both are logic 1 when the clock is also logic 1, the latching action is bypassed and both outputs will go to logic 1. The difference in this case is that if the CLK input drops to logic 0 first, there is no question or doubt -- a true race condition will exist, and you cannot tell which way the outputs will come to rest. The example circuit on this page reflects this uncertainty.

For correct operation, the selected R or S input should be brought to logic 1, then the CLK input should be made logic 1 and then logic 0 again. Finally, the selected input should be returned to logic 0.

The clocked RS latch solves some of the problems of basic RS latch circuit, and allows closer control of the latching action. However, it is by no means a complete solution. A major problem remaining is that this latch circuit could easily experience a change in S and R input levels while the CLK input is still at a logic 1 level. This allows the circuit to change state many times before the CLK input returns to logic 0.

One way to minimize this problem is to keep the CLK at logic 0 most of the time, and to allow only brief changes to logic 1. However, this approach still cannot guarantee that the latch will only change state once while the clock signal is at logic 1. This signal must have a certain duration to make sure all latches have time to respond to it, and in that time, most latches can respond to multiple changes.

A better way is to make sure that the latch can only change its outputs at one instant of the clock cycle. The next page will demonstrate a circuit which solves this problem handily, by changing states only on a particular transistion, or edge, of the clock signal. --- The Edge-Triggered RS Flip-Flop

To adjust the clocked RS latch for edge triggering, we must actually combine two identical clocked latch circuits, but have them operate on opposite halves of the clock signal. The resulting circuit is commonly called a flip-flop, because its output can first flip one way and then flop back the other way. The clocked RS latch is also sometimes called a flip-flop, although it is more properly referred to as a latch circuit.

The two-section flip-flop is also known as a master-slave flip-flop, because the input latch operates as the master section, while the output section is slaved to the master during half of each clock cycle.

The edge-triggered RS NAND flip-flop is shown below.

The edge-triggered RS flip-flop actually consists of two identical RS latch circuits, as shown above. However, the inverter connected between the two CLK inputs ensures that the two sections will be enabled during opposite half-cycles of the clock signal. This is the key to the operation of this circuit.

If we start with the CLK input at logic 0 as initially depicted above, the S and R inputs are disconnected from the input (master) latch. Therefore, any changes in the input signals cannot affect the state of the final outputs.

When the CLK signal goes to logic 1, the S and R inputs are able to control the state of the input latch, just as with the single RS latch circuit you already examined. However, at the same time the inverted CLK signal applied to the output (slave) latch prevents the state of the input latch from having any effect here. Therefore, any changes in the R and S input signals are tracked by the input latch while CLK is at logic 1, but are not reflected at the Q and Q' outputs.

When CLK falls again to logic 0, the S and R inputs are again isolated from the input latch. At the same time, the inverted CLK signal now allows the current state of the input latch to reach the output latch. Therefore, the Q and Q' outputs can only change state when the CLK signal falls from a logic 1 to logic 0. This is known as the falling edge of the CLK signal; hence the designation edge-triggered flip-flop.

By going to a master-slave structure and making the flip-flop edge-triggered, we have made sure that we can precisely control the moment when all flip-flops will change state. We have also allowed plenty of time for the master latch to respond to the input signals, and for those input signals to change and settle following the previous change of state.

There is still one problem left to solve: the possible race condition which may occur if both the S and R inputs are at logic 1 when CLK falls from logic 1 to logic 0. In the example above, we automatically assume that the race will always end with the master latch in the logic 1 state, but this will not be certain with real components. Therefore, we need to have a way to prevent race conditions from occurring at all. That way we won't have to figure out which gate in the circuit won the race on this particular occasion.

The solution is to add some additional feedback from the slave latch to the master latch. The resulting circuit is called a JK flip-flop. --- The JK Flip-Flop

To prevent any possibility of a "race" condition occurring when both the S and R inputs are at logic 1 when the CLK input falls from logic 1 to logic 0, we must somehow prevent one of those inputs from having an effect on the master latch in the circuit. At the same time, we still want the flip-flop to be able to change state on each falling edge of the CLK input, if the input logic signals call for this. Therefore, the S or R input to be disabled depends on the current state of the slave latch outputs.

If the Q output is a logic 1 (the flip-flop is in the "Set" state), the S input can't make it any more set than it already is. Therefore, we can disable the S input without disabling the flip-flop under these conditions. In the same way, if the Q output is logic 0 (the flip-flop is Reset), the R input can be disabled without causing any harm. If we can accomplish this without too much trouble, we will have solved the problem of the "race" condition.

The circuit below shows the solution. To the RS flip-flop we have added two new connections from the Q and Q' outputs back to the original input gates. Remember that a NAND gate may have any number of inputs, so this causes no trouble. To show that we have done this, we change the designations of the logic inputs and of the flip-flop itself. The inputs are now designated J (instead of S) and K (instead of R). The entire circuit is known as a JK flip-flop.

In most ways, the JK flip-flop behaves just like the RS flip-flop. The Q and Q' outputs will only change state on the falling edge of the CLK signal, and the J and K inputs will control the future output state pretty much as before. However, there are some important differences.

Since one of the two logic inputs is always disabled according to the output state of the overall flip-flop, the master latch cannot change state back and forth while the CLK input is at logic 1. Instead, the enabled input can change the state of the master latch once, after which this latch will not change again. This was not true of the RS flip-flop.

If both the J and K inputs are held at logic 1 and the CLK signal continues to change, the Q and Q' outputs will simply change state with each falling edge of the CLK signal. (The master latch circuit will change state with each rising edge of CLK.) We can use this characteristic to advantage in a number of ways. A flip-flop built specifically to operate this way is typically designated as a T (for Toggle) flip-flop. The lone T input is in fact the CLK input for other types of flip-flops.

The JK flip-flop must be edge triggered in this manner. Any level-triggered JK latch circuit will oscillate rapidly if all three inputs are held at logic 1. This is not very useful. For the same reason, the T flip-flop must also be edge triggered. For both types, this is the only way to ensure that the flip-flop will change state only once on any given clock pulse.

Because the behavior of the JK flip-flop is completely predictable under all conditions, this is the preferred type of flip-flop for most logic circuit designs. The RS flip-flop is only used in applications where it can be guaranteed that both R and S cannot be logic 1 at the same time.

At the same time, there are some additional useful configurations of both latches and flip-flops. In the next pages, we will look first at the major configurations and note their properties. Then we will see how multiple flip-flops or latches can be combined to perform useful functions and operations. --- The D Latch

One very useful variation on the RS latch circuit is the Data latch, or D latch as it is generally called. As shown in the logic diagram below, the D latch is constructed by using the inverted S input as the R input signal. The single remaining input is designated "D" to distinguish its operation from other types of latches. It makes no difference that the R input signal is effectively clocked twice, since the CLK signal will either allow the signals to pass both gates or it will not.

For comparison, you can review the RS NAND latch circuit if you wish. Use the "Back" button or equivalent to return here.

In the D latch, when the CLK input is logic 1, the Q output will always reflect the logic level present at the D input, no matter how that changes. When the CLK input falls to logic 0, the last state of the D input is trapped and held in the latch, for use by whatever other circuits may need this signal.

Because the single D input is also inverted to provide the signal to reset the latch, this latch circuit cannot experience a "race" condition caused by all inputs being at logic 1 simultaneously. Therefore the D latch circuit can be safely used in any circuit.

Although the D latch does not have to be made edge triggered for safe operation, there are some applications where an edge-triggered D flip-flop is desirable. This can be accomplished by using a D latch circuit as the master section of an RS flip-flop, as shown on this page. Both types are useful, so both are made commercially available.

Except for the change in input circuitry, a D flip-flop works just like the RS flip-flop.

With all of these different types of latches and flip-flops, the logic diagrams we have been using have gotten rather large, especially for the edge-triggered flip-flops. Fortunately, it really isn't necessary to follow and understand the inner workings of any of these circuits when they are used in larger applications. Instead, we use a set of very simple symbols to represent each type of latch or flip-flop in larger logical circuits. That is the subject of a separate page on Flip-Flop Symbols. --- The D Flip-Flop

The edge-triggered D flip-flop is easily derived from its RS counterpart. The only requirement is to replace the R input with an inverted version of the S input, which thereby becomes D. This is only needed in the master latch section; the slave remains unchanged.

One essential point about the D flip-flop is that when the clock input falls to logic 0 and the outputs can change state, the Q output always takes on the state of the D input at the moment of the clock edge. This was not true of the RS and JK flip-flops. The RS master section would repeatedly change states to match the input signals while the clock line is logic 1, and the Q output would reflect whichever input most recently received an active signal. The JK master section would receive and hold an input to tell it to change state, and never change that state until the next cycle of the clock. This behavior is not possible with a D flip-flop.

The edge-triggered D NAND flip-flop is shown below.

--- Flip-Flop Symbols

Although the internal circuitry of latches and flip-flops is interesting to watch on an individual basis, placing all of those logic symbols in a diagram involving multiple flip-flops would rapidly generate so much clutter that the overall purpose of the diagram would be lost. To avoid this problem, we use the "black-box" approach. This is actually just one step further that the "black-box" approach we used in specifying logic gate symbols to represent specific clusters of electronic components � now we are using one symbol to represent a cluster of logic gates connected to perform a specific function.

Some typical flip-flop symbols are shown below:

As you have no doubt noticed, the symbols above are nearly identical � only the inputs vary. This is typical of the "black-box" approach. However, there is one other variation, as shown to the right.

In each of the symbols above, the clock input is marked by the small angle, rather than by the letters CLK. That little angle marker actually provides two pieces of information, rather than one. First, of course, it marks the clocking input. Second, it specifies that these are edge-triggered flip-flops. The D latch shown to the right uses a rounded marker for the clock input. This signifies that the circuit is controlled by the clock level, not the clock edge. In fact, the symbol to the right would normally be used for the D latch circuit shown separately. If we change that rounded input to a sharp angle, it would indicate an edge-triggered master-slave D flip-flop.

Any of these symbols may be modified according to their actual use within the larger circuit. For example, if only the Q output is used, it may well be the only output shown. Some flip-flops incorporate master preset or reset inputs, which bypass the clock and the master section of an edge-triggered flip-flop and force the output to an immediate known state. This is often used when a circuit comprised of many flip-flops is first powered up, so that all circuits will start in a known state.

It is very seldom that a flip-flop will actually be used alone. Such circuits are far more useful when grouped together and acting in concert. There are two general ways in which flip-flops may be interconnected to perform useful functions: counters and registers. When we're done with individual flip-flops, we'll go on to counters and then look at registers. --- Converting Flip-Flop Input Types

Sometimes it just happens that you need a particular type of flip-flop for a specific application, but all you have available is another type. This often happens with an application needing T flip-flops, since these are not generally available in commercial packages. Rather, it is necessary to re-wire an available type to perform as a T device.

Fortunately, this is not hard. We've already seen that a JK flip-flop with its J and K inputs connected to a logic 1 will operate as a T flip-flop. Converting an RS flip-flop involves a bit more, as shown to the right. However, the simple feedback connections shown will ensure that the S and R inputs will always tell the flip-flop to change state at each clock pulse.

Converting a D flip-flop to T operation is quite similar; the Q' output is connected back to the D input.

Another conversion that is required on occasion is to convert an RS flip-flop to D operation. This change eliminates the possibility of an illegal input condition, which could otherwise cause spurious results in some applications.

In this case, we do need to add an inverter to supply the R input signal, as shown to the left.

A much more complicated circuit, shown to the right, is the gating structure needed to convert a D flip-flop to JK operation. This circuit implements the logical truth that D = JQ' + K'Q.

This input circuit is actually used more frequently than you might think. CMOS flip-flops are typically constructed as D types because of the nature of their internal operation. Commercial CMOS JK flip-flops, such as the 4013, then add this circuit to the input in order to get JK operation.

This approach eliminates the internal latching effect, or "ones catching," that occurs with the general JK master-slave flip-flop. The J and K input signals must be present at the time the clock signal falls to logic 0, in order to affect the new output state. --- D Flip-Flop Using NOR Latches

This circuit utilizes three interconnected RS latch circuits, as shown. This example uses NOR gates, but NAND gates can easily be used to perform the same function.

The two input latch circuits essentially store the D and D' signals separately, and apply those stored signals to the output latch. While the CLK input is a logic 0, changes to the D input can only affect the state of the lower gate of the lower input latch circuit. The other gates are locked into their output states by their other interconnections.

When CLK goes to logic 1, it inherently forces the outputs of the two middle input gates to logic 0. This effectively isolates the output latch from any input changes. Note that at this time, one or the other of the two input latches will be in an illegal state, depending on the state of the D input. This illegal state overrides the latching action of that input circuit.

Now, when CLK falls to logic 0, whichever input latch was in an illegal state will abruptly resume its latching action, and will at once control the state of the output latch. In this manner, the circuit is still an edge-triggered flip-flop that will take on the state of the D input at the moment of the falling clock edge. --- CMOS Flip-Flop Construction

CMOS technology allows a very different approach to flip-flop design and construction. Instead of using logic gates to connect the clock signal to the master and slave sections of the flip-flop, a CMOS flip-flop uses transmission gates to control the data connections. (See the CMOS gate electronics page for a closer look at the transmission gate itself.)

The result is that a controllable flip-flop can be built with only inverters and transmission gates � a very small and simple structure for an IC.

The basic CMOS D flip-flop is shown below. --- A Basic Digital Counter

One common requirement in digital circuits is counting, both forward and backward. Digital clocks and watches are everywhere, timers are found in a range of appliances from microwave ovens to VCRs, and counters for other reasons are found in everything from automobiles to test equipment.

Although we will see many variations on the basic counter, they are all fundamentally very similar. The demonstration below shows the most basic kind of binary counting circuit. In the 4-bit counter to the right, we are using edge-triggered master-slave flip-flops similar to those in the Sequential portion of these pages. The output of each flip-flop changes state on the falling edge (1-to-0 transistion) of the T input.

The count held by this counter is read in the reverse order from the order in which the flip-flops are triggered. Thus, output D is the high order of the count, while output A is the low order. The binary count held by the counter is then DCBA, and runs from 0000 (decimal 0) to 1111 (decimal 15). The next clock pulse will cause the counter to try to increment to 10000 (decimal 16). However, that 1 bit is not held by any flip-flop and is therefore lost. As a result, the counter actually reverts to 0000, and the count begins again.

In future pages on counters, we will use a different input scheme, as shown to the left. Instead of changing the state of the input clock with each click, you will send one complete clock pulse to the counter when you click the input button. The button image will reflect the state of the clock pulse, and the counter image will be updated at the end of the pulse. For a clear view without taking excessive time, each clock pulse has a duration or pulse width of 300 ms (0.3 second). The demonstration system will ignore any clicks that occur within the duration of the pulse.

A major problem with the counters shown on this page is that the individual flip-flops do not all change state at the same time. Rather, each flip-flop is used to trigger the next one in the series. Thus, in switching from all 1s (count = 15) to all 0s (count wraps back to 0), we don't see a smooth transistion. Instead, output A falls first, changing the apparent count to 14. This triggers output B to fall, changing the apparent count to 12. This in turn triggers output C, which leaves a count of 8 while triggering output D to fall. This last action finally leaves us with the correct output count of zero. We say that the change of state "ripples" through the counter from one flip-flop to the next. Therefore, this circuit is known as a "ripple counter."

This causes no problem if the output is only to be read by human eyes; the ripple effect is too fast for us to see it. However, if the count is to be used as a selector by other digital circuits (such as a multiplexer or demultiplexer), the ripple effect can easily allow signals to get mixed together in an undesirable fashion. To prevent this, we need to devise a method of causing all of the flip-flops to change state at the same moment. That would be known as a "synchronous counter" because the flip-flops would be synchronized to operate in unison. That is the subject of the next page in this series. --- A Synchronous Binary Counter

In our initial discussion on counters (A Basic Digital Counter), we noted the need to have all flip-flops in a counter to operate in unison with each other, so that all bits in the ouput count would change state at the same time. To accomplish this, we need to apply the same clock pulse to all flip-flops.

However, we do not want all flip-flops to change state with every clock pulse. Therefore, we'll need to add some controlling gates to determine when each flip-flop is allowed to change state, and when it is not. This requirement denies us the use of T flip-flops, but does require that we still use edge-triggered circuits. We can use either RS or JK flip-flops for this; we'll use JK flip-flops for the demonstrations on this page.

To determine the gates required at each flip-flop input, let's start by drawing up a truth table for all states of the counter. Such a table is shown to the right.

Looking first at output A, we note that it must change state with every input clock pulse. Therefore, we could use a T flip-flop here if we wanted to. We won't do so, just to make all of our flip-flops the same. But even with JK flip-flops, all we need to do here is to connect both the J and K inputs of this flip-flop to logic 1 in order to get the correct activity.

Flip-flop B is a bit more complicated. This output must change state only on every other input clock pulse. Looking at the truth table again, output B must be ready to change states whenever output A is a logic 1, but not when A is a logic 0. If we recall the behavior of the JK flip-flop, we can see that if we connect output A to the J and K inputs of flip-flop B, we will see output B behaving correctly.

Continuing this line of reasoning, output C may change state only when both A and B are logic 1. We can't use only output B as the control for flip-flop C; that will allow C to change state when the counter is in state 2, causing it to switch directly from a count of 2 to a count of 7, and again from a count of 10 to a count of 15 � not a good way to count. Therefore we will need a two-input AND gate at the inputs to flip-flop C. Flip-flip D requires a three-input AND gate for its control, as outputs A, B, and C must all be at logic 1 before D can be allowed to change state.

The resulting circuit is shown in the demonstration below. States Count D C B A 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 9 1 0 1 0 10 1 0 1 1 11 1 1 0 0 12 1 1 0 1 13 1 1 1 0 14 1 1 1 1 15

When we started our look into counters, we noted a lot of applications involving numeric displays: clocks, ovens, microwave ovens, VCRs, etc. These applications require a decimal count in most cases, and a count from 0 to 5 for some digits in a clock display. Can we use a method of gating, such as we used above in the synchronous binary counter, to shorten the counting sequence to the appropriate extent?

Obviously there is a way, since digital clocks and watches do exist and do work. Starting on the next page, we'll see how. --- To create a decimal counter, we need to find a way to cut the counting sequence short. The Truth Table to the left shows the actual counting sequence we need. Note that the counting sequence is exactly the same as for the binary counter we saw on the previous page, up through a count of 9. At that point, where the binary counter would continue on to a count of 10, the decimal counter must reset itself to a count of 0.

In this sequence, flip-flops A and C are no problem. Their next states will both be logic 0 whether the next count is 10 or 0. However, flip-flop B would normally switch from logic 0 to logic 1, and must be prevented from doing so. At the same time, flip-flop D, which is at logic 1, must be made to switch back to logic 0.

Hmmmm. Since flip-flop D is a logic 1 for only two counts, and only flip-flop A will change state going from count 8 to count 9 in any case, perhaps we can use the D and D' outputs, with gates, to force the desired change in sequence. This is in fact the case, as shown in the demonstration below. Note that we have applied different signals to the J and K inputs of flip-flop D. This is perfectly acceptable, and allows us to reset this flip-flop under the control of a simple two-input AND gate. D C B A 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 9

The base-6 counter (counting from 0-5) is just a shorter version of the decimal counter. Flip-flop D is no longer needed, but the logic of controlling the count is not really different. The demonstration to the right shows a practical counter for the 10s of minutes or seconds in a digital clock.

Now that we've seen counting sequences other than binary, new questions arise: Can we generate other counting sequences for special purposes? And are there other uses for counting circuits than numeric counts? We'll explore these questions on the next page. --- If we apply a fixed-frequency pulse train to a counter, rather than individual pulses coming at random intervals, we begin to notice some interesting characteristics, and some useful relationships between the input clock signal and the output signals.

Consider a single flip-flop with a continuous succession of clock pulses at a fixed frequency, such as the one shown to the right. We note three useful facts about the output signals seen at Q and Q': They are exactly inverted from each other. They are perfect square waves (50% duty cycle). They have a frequency just half that of the clock pulse train.

The duty cycle of any rectangular waveform refers to the percentage of the full cycle that the signal remains at logic 1. If the signal spends half its time at logic 1 and the other half at logic 0, we have a waveform with a 50% duty cycle. This describes a perfect, symmetrical square wave.

Frequency division by an odd number is also possible. The circuit to the left is a demonstration of a divide-by-3 counter. No gates are required to control the sequence if JK flip-flops are used; feeding the output signals back to the appropriate inputs is sufficient.

Of course, it is not possible to get a symmetrical (50% duty cycle) square wave with this circuit. The A output is at logic 1 for two clock pulses out of three; the B output is at logic 1 for one clock pulse out of three. Thus, duty cycles of 1/3 (33.333%) and 2/3 (66.667%) are available.

This rendition of a divide-by-5 counter actually follows the normal decimal (or binary) count from zero through four. The primary control feature is the feedback from the C' output to flip-flop A's J input. This feedback prevents flip-flop A from switching from logic 0 to logic 1 in an effort to go from a count of four to a count of five. At the same time, the C output is applied to flip-flop C's K input to force flip-flop C to reset on the next clock pulse.

This particular arrangement is often combined with a single flip-flop in an IC package. The combination can then be used either as a normal decimal counter or as a divide-by-10 counter with a true square-wave output.

If it is not necessary to maintain a standard binary counting sequence, we can often interconnect the flip-flops so as to eliminate the need for any extra gates, as shown to the left. Note that the K inputs to both flip-flops A and B are connected to logic 1. As a result, outputs A and B will remain at logic 1 for only one clock pulse at a time, and will then reset to logic 0. Output C will toggle after B goes to logic 1.

Output C has a 40% duty cycle. Outputs A and B produce two output pulses for each pulse from C, but not at equal intervals. The counting sequence is 0, 1, 2, 5, 6, 0, etc.

This counter circuit actually has a flaw as shown: if it powers up in state 4 (A = 0, B = 0, C = 1), it will remain in that state and be unable to change at all. To correct this, we can disconnect C's K input from output B, and connect it to output A' instead. Now the first clock pulse will force the circuit to state 0 (000), from which the count will proceed normally. This change will not affect the normal counting sequence, because a logic 1 at the K input cannot prevent the flip-flop from changing to a logic 1, and would force C back to a logic 0 at the same time it would change anyway.

Other counting sequences are also possible, of course. If a need exists to have two or more signals in a particular frequency relationship with each other, some extension or variation on the circuits shown here can be designed to supply the need. --- Counting in Reverse

Now that we've seen normal counting, let's see how we can count backwards. Countdowns are required in a wide range of applications, including everyday tasks. Remaining cooking time for either a conventional oven or microwave oven is commonly displayed this way, as distinguished from the time display that shows when the oven isn't doing something else.

Here we will modify the standard ripple counter to make it count backwards instead. In the 4-bit counter to the right, we are still using edge-triggered master-slave flip-flops similar to those in the Sequential portion of these pages. The output of each flip-flop changes state on the falling edge (1-to-0 transistion) of the T input. However, note that in this case each T input is triggered by the Q' output of the prior flip-flop, rather than by the Q output. As a result, each flip-flop will change state when the prior one changes from 0 to 1 at its Q output, rather than changing from 1 to 0.

Because of this, the first pulse will cause the counter to change state from 0000 to 1111.

Since this circuit counts downwards instead of upwards, we are left with a possible question: if the initial state of all zeroes represents a count of zero, what is the value represented by the next state of all ones? Is it 15 this time? Or would it be more true to call this state -1 for this circuit?

This in turn leads us to an essential question: how can we deal with negative numbers in binary notation? We must be able to do it, since negative numbers have meaning and must be dealt with mathematically.

Since negative numbers fall in the province of mathematical computation, we will deal with them in their own page, on Negative Numbers and Binary Subtraction. --- The Johnson Counter

In some cases, we want a counter that provides individual digit outputs rather than a binary or BCD output. Of course, we can do this by adding a decoder circuit to the binary counter. However, in many cases it is much simpler to use a different counter structure, that will permit much simpler decoding of individual digit outputs.

For example, consider the counting sequence to the right. It actually resembles the behavior of a shift register more than a counter, but that need not be a problem. Indeed, we can easily use a shift register to implement such a counter. In addition, we can notice that each legal count may be defined by the location of the last flip-flop to change states, and which way it changed state. This can be accomplished with a simple two-input AND or NOR gate monitoring the output states of two adjacent flip-flops. In this way, we can use ten simple 2-input gates to provide ten decoded outputs for digits 0-9. This is known as the Johnson counting sequence, and counters that implement this approach are called Johnson Counters.

We could also make an octal counter by using four flip-flops in this configuration. In fact, this is done commercially: the CMOS ICs 4017 and 4022 are counters that implement this technique easily and cheaply.

There is one caveat that must be considered here: The 5-stage circuit uses five flip-flops, and therefore has 32 possible binary states, yet we only use ten states. The 4-stage counter uses only eight of 16 possible states. We must include circuitry that will filter out the illegal states and force this circuit to go towards the correct counting sequence, even if it finds itself in an illegal mode when first powered up. This is not difficult, and the demonstration circuit below includes the necessary gating structure.

The circuit below is logically equivalent to the CMOS 4017 decimal counter, although slightly simplified from the commercial unit. States Count A B C D E 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 2 1 1 1 0 0 3 1 1 1 1 0 4 1 1 1 1 1 5 0 1 1 1 1 6 0 0 1 1 1 7 0 0 0 1 1 8 0 0 0 0 1 9

The demonstration above initially implements only the legitimate counting sequence of the Johnson counter. To allow for all possible illegal combinations and show how they get straightened out, we would need 66 separate images for the overlays, and each image is about 6.5K bytes in size. That's a bit much to ask of many users.

However, you can see the count correction gates operating at the bottom of the counter, and see how they work. The D input to flip-flop C is not directly driven from the B output. Rather, A' and C' are ANDed together, and that combination is NORed with B'. As a result, improper bits reaching flip-flop B get blocked, and flip-flop C can only take on the correct state to reinstate the correct shifting sequence. To see this in action, click on any of the individual flip-flops in the figure. This will force a load of all remaining images and change the state of the selected flip-flop without applying a clock pulse. Then you can watch the behavior of the counter as it removes improper counting sequences. Remember that the download of the additional images may take some time, so please be patient.

You can always identify an illegal counting sequence because more than one output will be high (logic 1). Since each output is enabled by a transition from 0 to 1 or from 1 to 0 in a specific position in the counter, more than one transition will produce more than one output, which is illegal in this context.

Also note that in order to repeatedly invert the shifting bits as they start from flip-flop A, the E' output is fed back to the A flip-flop's D input. This shift does not constitute a second transition here; only when all bits are the same does this appear as a transition.

Of course, these must necessarily be edge-triggered flip-flops clocked simultaneously. The Reset inputs are asynchronous and override the clocking signal. In addition, the CMOS ICs that serve as the model for this demonstration change state on the rising edge of the clock, so this model does the same.

The COUT signal is the Carry Out, which is a symmetrical square wave at one-tenth of the incoming Clock signal frequency. It is quite suitable for clocking a second counter of the same type, to form a multiple-digit decimal counter. --- Serial-to-Parallel Shift Register

The term register can be used in a variety of specific applications, but in all cases it refers to a group of flip-flops operating as a coherent unit to hold data. This is different from a counter, which is a group of flip-flops operating to generate new data by tabulating it.

In this context, a counter can be viewed as a specialized kind of register, which counts events and thereby generates data, rather than just holding the data or changing the way it is handled. More commonly, however, counters are treated separately from registers. The two are then handled as separate concepts which work together in many applications, and which have some features in common.

The demonstration circuit below is known as a shift register because data is shifted through it, from flip-flop to flip-flop. If you apply one byte (8 bits) of data to the initial data input one bit at a time, and apply one clock pulse to the circuit after setting each bit of data, you will find the entire byte present at the flip-flop outputs in parallel format. Therefore, this circuit is known as a serial-in, parallel-out shift register. It is also known sometimes as a shift-in register, or as a serial-to-parallel shift register.

By standardized convention, the least significant bit (LSB) of the byte is shifted in first.

As you would no doubt expect, the counterpart to the shift register above is the parallel-in, serial-out shift register, somtimes called a shift-out register. That circuit is a bit more complex that the shift-in register shown above, but generally operates in a very similar fashion, as we'll see on the next page. --- Where there is a need for serial-to-parallel conversion, there is also a need for parallel-to-serial conversion. The parallel-in, serial-out register (or parallel-to-serial shift register, or shift-out register), however, is a bit more complex than its counterpart. Since each flip-flop in the register must be able to accept data from either a serial or a parallel source, a small two-input multiplexer is required in front of each input. An extra input line selects between serial and parallel input signals, and as usual the flip-flops are loaded in accordance with a common clock signal.

The shift-out demonstration circuit below is limited to four bits so it can fit horizontally on a reasonable page. This is also a practical size for commercial ICs. A 4-bit shift register with parallel and serial inputs and outputs will fit nicely into a 14-pin DIP IC.

In addition, this demonstration circuit introduces a new input button: a mode control. The button labelled "S" indicates that the shift-out register is currently in serial mode. Thus, input signals present at the serial input just above the "S" button will be shifted into the register one by one with each clock pulse. If you click on the "S" button, it will change state as expected, but will also change to a "P" to indicate that the register now operates in parallel mode. This enables you to load the entire register at once from the parallel inputs just below the multiplexers. Thus, we can have a parallel input and a serial output. The inclusion of a serial input makes it possible to cascade multiple circuits of this type in order to increase the number of bits in the total register. This is common practice in real-world circuits.

Because this circuit has both parallel and serial inputs and outputs, it can serve as either a shift-in register or a shift-out register. This capability can have advantages in many cases.

The least significant bit (LSB) is always available first at the serial output. --- The 555 timer IC is an amazingly simple yet versatile device. It has been around now for many years and has been reworked into a number of different technologies. The two primary versions today are the original bipolar design and the more recent CMOS equivalent. These differences primarily affect the amount of power they require and their maximum frequency of operation; they are pin-compatible and functionally interchangeable.

This page contains only a description of the 555 timer IC itself. Functional circuits and a few of the very wide range of its possible applications will be covered in additional pages in this category.

The figure to the right shows the functional block diagram of the 555 timer IC. The IC is available in either an 8-pin round TO3-style can or an 8-pin mini-DIP package. In either case, the pin connections are as follows: Ground. Trigger input. Output. Reset input. Control voltage. Threshhold input. Discharge. +VCC. +5 to +15 volts in normal use.

The operation of the 555 timer revolves around the three resistors that form a voltage divider across the power supply, and the two comparators connected to this voltage divider. The IC is quiescent so long as the trigger input (pin 2) remains at +VCC and the threshhold input (pin 6) is at ground. Assume the reset input (pin 4) is also at +VCC and therefore inactive, and that the control voltage input (pin 5) is unconnected. Under these conditions, the output (pin 3) is at ground and the discharge transistor (pin 7) is turned on, thus grounding whatever is connected to this pin.

The three resistors in the voltage divider all have the same value (5K in the bipolar version of this IC), so the comparator reference voltages are 1/3 and 2/3 of the supply voltage, whatever that may be. The control voltage input at pin 5 can directly affect this relationship, although most of the time this pin is unused.

The internal flip-flop changes state when the trigger input at pin 2 is pulled down below +VCC/3. When this occurs, the output (pin 3) changes state to +VCC and the discharge transistor (pin 7) is turned off. The trigger input can now return to +VCC; it will not affect the state of the IC.

However, if the threshhold input (pin 6) is now raised above (2/3)+VCC, the output will return to ground and the discharge transistor will be turned on again. When the threshhold input returns to ground, the IC will remain in this state, which was the original state when we started this analysis.

The easiest way to allow the threshhold voltage (pin 6) to gradually rise to (2/3)+VCC is to connect it to a capacitor being allowed to charge through a resistor. In this way we can adjust the R and C values for almost any time interval we might want.

The 555 can operate in either monostable or astable mode, depending on the connections to and the arrangement of the external components. Thus, it can either produce a single pulse when triggered, or it can produce a continuous pulse train as long as it remains powered.

In monostable mode, the timing interval, t, is set by a single resistor and capacitor, as shown to the right. Both the threshhold input and the discharge transistor (pins 6 & 7) are connected directly to the capacitor, while the trigger input is held at +VCC through a resistor. In the absence of any input, the output at pin 3 remains low and the discharge transistor prevents capacitor C from charging.

When an input pulse arrives, it is capacitively coupled to pin 2, the trigger input. The pulse can be either polarity; its falling edge will trigger the 555. At this point, the output rises to +VCC and the discharge transistor turns off. Capacitor C charges through R towards +VCC. During this interval, additional pulses received at pin 2 will have no effect on circuit operation.

The standard equation for a charging capacitor applies here: e = E(1 - (-t/RC)). Here, "e" is the capacitor voltage at some instant in time, "E" is the supply voltage, VCC, and "" is the base for natural logarithms, approximately 2.718. The value "t" denotes the time that has passed, in seconds, since the capacitor started charging.

We already know that the capacitor will charge until its voltage reaches (2/3)+VCC, whatever that voltage may be. This doesn't give us absolute values for "e" or "E," but it does give us the ratio e/E = 2/3. We can use this to compute the time, t, required to charge capacitor C to the voltage that will activate the threshhold comparator: 2/3 = 1 - (-t/RC) -1/3 = -(-t/RC) 1/3 = (-t/RC) ln(1/3) = -t/RC -1.0986123 = -t/RC t = 1.0986123RC t = 1.1RC

The value of 1.1RC isn't exactly precise, of course, but the roundoff error amounts to about 0.126%, which is much closer than component tolerances in practical circuits, and is very easy to use. The values of R and C must be given in Ohms and Farads, respectively, and the time will be in seconds. You can scale the values as needed and appropriate for your application, provided you keep proper track of your powers of 10. For example, if you specify R in megohms and C in microfarads, t will still be in seconds. But if you specify R in kilohms and C in microfarads, t will be in milliseconds. It's not difficult to keep track of this, but you must be sure to do it accurately in order to correctly calculate the component values you need for any given time interval.

The timing interval is completed when the capacitor voltage reaches the (2/3)+VCC upper threshhold as monitored at pin 6. When this threshhold voltage is reached, the output at pin 3 goes low again, the discharge capacitor (pin 7) is turned on, and the capacitor rapidly discharges back to ground once more. The circuit is now ready to be triggered once again.

If we rearrange the circuit slightly so that both the trigger and threshhold inputs are controlled by the capacitor voltage, we can cause the 555 to trigger itself repeatedly. In this case, we need two resistors in the capacitor charging path so that one of them can also be in the capacitor discharge path. This gives us the circuit shown to the left.

In this mode, the initial pulse when power is first applied is a bit longer than the others, having a duration of 1.1(Ra + Rb)C. However, from then on, the capacitor alternately charges and discharges between the two comparator threshhold voltages. When charging, C starts at (1/3)VCC and charges towards VCC. However, it is interrupted exactly halfway there, at (2/3)VCC. Therefore, the charging time, t1, is -ln(1/2)(Ra + Rb)C = 0.693(Ra + Rb)C.

When the capacitor voltage reaches (2/3)VCC, the discharge transistor is enabled (pin 7), and this point in the circuit becomes grounded. Capacitor C now discharges through Rb alone. Starting at (2/3)VCC, it discharges towards ground, but again is interrupted halfway there, at (1/3)VCC. The discharge time, t2, then, is -ln(1/2)(Rb)C = 0.693(Rb)C.

The total period of the pulse train is t1 + t2, or 0.693(Ra + 2Rb)C. The output frequency of this circuit is the inverse of the period, or 1.44/(Ra + 2Rb)C.

Note that the duty cycle of the 555 timer circuit in astable mode cannot reach 50%. On time must always be longer than off time, because Ra must have a resistance value greater than zero to prevent the discharge transistor from directly shorting VCC to ground. Such an action would immediately destroy the 555 IC.

One interesting and very useful feature of the 555 timer in either mode is that the timing interval for either charge or discharge is independent of the supply voltage, VCC. This is because the same VCC is used both as the charging voltage and as the basis of the reference voltages for the two comparators inside the 555. Thus, the timing equations above depend only on the values for R and C in either operating mode.

In addition, since all three of the internal resistors used to make up the reference voltage divider are manufactured next to each other on the same chip at the same time, they are as nearly identical as can be. Therefore, changes in temperature will also have very little effect on the timing intervals, provided the external components are temperature stable. A typical commercial 555 timer will show a drift of 50 parts per million per Centigrade degree of temperature change (50 ppm/�C) and 0.01%/Volt change in VCC. This is negligible in most practical applications. ?--- 555 Application: Pulse Sequencer

One requirement in certain digital circuits is for the generation of a series of pulses in time sequence, but on different lines. The pulse widths may or may not be the same, but they must occur one after the other, and therefore cannot come from the same source.

Sometimes pulses are required to overlap, or there must be a set delay following the end of one pulse before another pulse begins. Or, One pulse must begin a set time after another begins. The possible variations in timing requirements are almost endless, and many different approaches have been used to provide pulses with the necessary timing relationships. One inexpensive method that is perfectly satisfactory in many applications is to use interconnected 555 timers to generate the necessary timing intervals.

In the circuit shown above, we see three 555 timers, all configured in monostable mode. Each one, from left to right, triggers the next at the end of its timing interval. The resulting pulse timing is shown in the timing diagram to the right.

The sequence starts with the falling edge of the incoming trigger pulse. That edge triggers timer A, causing output A to go high. At this point, the incoming trigger pulse can either stay low or go high; it is no longer important.

Output A will remain high for the duration of its timing interval, and then fall back to its low state. At this time, it triggers timer B. Output B therefore goes high as output A falls. The same thing happens again at the end of the B timing interval; output B falls and triggers timer C.

At the end of the C timing interval, the sequence is over and all timers are quiescent, awaiting the arrival of the next triggering signal.

This time, the circuit is wired so that the incoming trigger signal is applied to both timers A and B. However, B's timing interval is very short, so it triggers timer C while the A output is still high. Depending on the designed timing intervals, C can easily be triggered and finish its timing interval while A is still active. Or, C can remain active after A falls back to its quiescent state.

Any number of 555 timers can be sequentially or jointly triggered with this kind of arrangement, and each timer still has its own individually-controlled timing interval. The possible combinations are endless, and independent pulses can overlap or not according to the needs of the application.

The initial triggering signal can come from any source. It can even be from another 555 timer, operating in astable mode. In that case, this kind of circuit is self-starting and will operate continuously.

It is also possible to trigger this sort of circuit manually, using a momentary-contact pushbutton to provide the triggering pulse. Or it could be some sort of sensor device, triggering the circuit upon recognition of some external condition. Thus, the circuit can be triggered by any kind of event, just as it can be used to control any kind of circuit.

There is one drawback to using daisy-chained 555 timers in this fashion. Once a 555 timer in monostable mode has been triggered, it cannot be re-triggered and the timing interval cannot be changed (at least without the addition of external circuitry to accomplish that). Therefore, if a second trigger pulse arrives while the input timer(s) are still active, it will be ignored. A worse possibility exists for the second example above: If the B interval has been completed but the A interval has not been completed when a new trigger pulse is received, timer B will be triggered but timer A will ignore it. If the timing relationship between the A and C pulses is critical, this could cause problems.

Nevertheless, this type of circuit can be highly versatile and useful, provided appropriate precautions are taken to ensure that such errors will not occur.

LOGIC FAMILIES

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Inside Logic Gates

I have received a number of requests, asking just what goes on inside logic gates to actually perform logic functions. So, by popular demand, here are the internal schematics of various gates, as implemented by several different logic families.

I won't cover the internal operation of individual semiconductor devices in these pages, except to state the basic behavior of a given device under specific conditions. More detailed coverage of semiconductor physics and internal behavior is a job for another set of pages, which will come later.

There are several different families of logic gates. Each family has its capabilities and limitations, its advantages and disadvantages. The following list describes the main logic families and their characteristics. You can follow the links to see the circuit construction of gates of each family.

Diode Logic (DL)

Diode logic gates use diodes to perform AND and OR logic functions. Diodes have the property of easily passing an electrical current in one direction, but not the other. Thus, diodes can act as a logical switch.

Diode logic gates are very simple and inexpensive, and can be used effectively in specific situations. However, they cannot be used extensively, as they tend to degrade digital signals rapidly. In addition, they cannot perform a NOT function, so their usefulness is quite limited.

Resistor-Transistor Logic (RTL)

Resistor-transistor logic gates use Transistors to combine multiple input signals, which also amplify and invert the resulting combined signal. Often an additional transistor is included to re-invert the output signal. This combination provides clean output signals and either inversion or non-inversion as needed.

RTL gates are almost as simple as DL gates, and remain inexpensive. They also are handy because both normal and inverted signals are often available. However, they do draw a significant amount of current from the power supply for each gate. Another limitation is that RTL gates cannot switch at the high speeds used by today's computers, although they are still useful in slower applications.

Although they are not designed for linear operation, RTL integrated circuits are sometimes used as inexpensive small-signal amplifiers, or as interface devices between linear and digital circuits.

Diode-Transistor Logic (DTL)

By letting diodes perform the logical AND or OR function and then amplifying the result with a transistor, we can avoid some of the limitations of RTL. DTL takes diode logic gates and adds a transistor to the output, in order to provide logic inversion and to restore the signal to full logic levels.

Transistor-Transistor Logic (TTL)

The physical construction of integrated circuits made it more effective to replace all the input diodes in a DTL gate with a transistor, built with multiple emitters. The result is transistor-transistor logic, which became the standard logic circuit in most applications for a number of years.

As the state of the art improved, TTL integrated circuits were adapted slightly to handle a wider range of requirements, but their basic functions remained the same. These devices comprise the 7400 family of digital ICs.

Emitter-Coupled Logic (ECL)

Also known as Current Mode Logic (CML), ECL gates are specifically designed to operate at extremely high speeds, by avoiding the "lag" inherent when transistors are allowed to become saturated. Because of this, however, these gates demand substantial amounts of electrical current to operate correctly.

CMOS Logic

One factor is common to all of the logic families we have listed above: they use significant amounts of electrical power. Many applications, especially portable, battery-powered ones, require that the use of power be absolutely minimized. To accomplish this, the CMOS (Complementary Metal-Oxide-Semiconductor) logic family was developed. This family uses enhancement-mode MOSFETs as its transistors, and is so designed that it requires almost no current to operate.

CMOS gates are, however, severely limited in their speed of operation. Nevertheless, they are highly useful and effective in a wide range of battery-powered applications.

Most logic families share a common characteristic: their inputs require a certain amount of current in order to operate correctly. CMOS gates work a bit differently, but still represent a capacitance that must be charged or discharged when the input changes state. The current required to drive any input must come from the output supplying the logic signal. Therefore, we need to know how much current an input requires, and how much current an output can reliably supply, in order to determine how many inputs may be connected to a single output.

However, making such calculations can be tedious, and can bog down logic circuit design. Therefore, we use a different technique. Rather than working constantly with actual currents, we determine the amount of current required to drive one standard input, and designate that as a standard load on any output. Now we can define the number of standard loads a given output can drive, and identify it that way. Unfortunately, some inputs for specialized circuits require more than the usual input current, and some gates, known as buffers, are deliberately designed to be able to drive more inputs than usual. For an easy way to define input current requirements and output drive capabilities, we define two new terms:

Fan-in

The number of standard loads drawn by an input to ensure reliable operation. Most inputs have a fan-in of 1.

Fan-out

The number of standard loads that can be reliably driven by an output, without causing the output voltage to shift out of its legal range of values.

Remember, fan-in and fan-out apply directly only within a given logic family. If for any reason you need to interface between two different logic families, be careful to note and meet the drive requirements and limitations of both families, within the interface circuitry.

Diode Logic

Diode Logic makes use of the fact that the electronic device known as a diode will conduct an electrical current in one direction, but not in the other. In this manner, the diode acts as an electronic switch.

To the left you see a basic Diode Logic OR gate. We'll assume that a logic 1 is represented by +5 volts, and a logic 0 is represented by ground, or zero volts. In this figure, if both inputs are left unconnected or are both at logic 0, output Z will also be held at zero volts by the resistor, and will thus be a logic 0 as well. However, if either input is raised to +5 volts, its diode will become forward biased and will therefore conduct. This in turn will force the output up to logic 1. If both inputs are logic 1, the output will still be logic 1. Hence, this gate correctly performs a logical OR function.

To the right is the equivalent AND gate. We use the same logic levels, but the diodes are reversed and the resistor is set to pull the output voltage up to a logic 1 state. For this example, +V = +5 volts, although other voltages can just as easily be used. Now, if both inputs are unconnected or if they are both at logic 1, output Z will be at logic 1. If either input is grounded (logic 0), that diode will conduct and will pull the output down to logic 0 as well. Both inputs must be logic 1 in order for the output to be logic 1, so this circuit performs the logical AND function.

In both of these gates, we have made the assumption that the diodes do not introduce any errors or losses into the circuit. This is not really the case; a silicon diode will experience a forward voltage drop of about 0.65v to 0.7v while conducting. But we can get around this very nicely by specifying that any voltage above +3.5 volts shall be logic 1, and any voltage below +1.5 volts shall be logic 0. It is illegal in this system for an output voltage to be between +1.5 and +3.5 volts; this is the undefined voltage region.

Individual gates like the two above can be used to advantage in specific circumstances. However, when DL gates are cascaded, as shown to the left, some additional problems occur. Here, we have two AND gates, whose outputs are connected to the inputs of an OR gate. Very simple and apparently reasonable.

But wait a minute! If we pull the inputs down to logic 0, sure enough the output will be held at logic 0. However, if both inputs of either AND gate are at +5 volts, what will the output voltage be? That diode in the OR gate will immediately be forward biased, and current will flow through the AND gate resistor, through the diode, and through the OR gate resistor.

If we assume that all resistors are of equal value (typically, they are), they will act as a voltage divider and equally share the +5 volt supply voltage. The OR gate diode will insert its small loss into the system, and the output voltage will be about 2.1 to 2.2 volts. If both AND gates have logic 1 inputs, the output voltage can rise to about 2.8 to 2.9 volts. Clearly, this is in the "forbidden zone," which is not supposed to be permitted.

If we go one step further and connect the outputs of two or more of these structures to another AND gate, we will have lost all control over the output voltage; there will always be a reverse-biased diode somewhere blocking the input signals and preventing the circuit from operating correctly. This is why Diode Logic is used only for single gates, and only in specific circumstances.

Resistor-Transistor Logic

Consider the most basic transistor circuit, such as the one shown to the left. We will only be applying one of two voltages to the input I: 0 volts (logic 0) or +V volts (logic 1). The exact voltage used as +V depends on the circuit design parameters; in RTL integrated circuits, the usual voltage is +3.6v. We'll assume an ordinary NPN transistor here, with a reasonable dc current gain, an emitter-base forward voltage of 0.65 volt, and a collector-emitter saturation voltage no higher than 0.3 volt. In standard RTL ICs, the base resistor is 470 and the collector resistor is 640.

When the input voltage is zero volts (actually, anything under 0.5 volt), there is no forward bias to the emitter-base junction, and the transistor does not conduct. Therefore no current flows through the collector resistor, and the output voltage is +V volts. Hence, a logic 0 input results in a logic 1 output.

When the input voltage is +V volts, the transistor's emitter-base junction will clearly be forward biased. For those who like the mathematics, we'll assume a similar output circuit connected to this input. Thus, we'll have a voltage of 3.6 - 0.65 = 2.95 volts applied across a series combination of a 640 output resistor and a 470 input resistor. This gives us a base current of: 2.95v / 1110 = 0.0026576577 amperes = 2.66 ma.

RTL is a relatively old technology, and the transistors used in RTL ICs have a dc forward current gain of around 30. If we assume a current gain of 30, 2.66 ma base current will support a maximum of 79.8 ma collector current. However, if we drop all but 0.3 volts across the 640 collector resistor, it will carry 3.3/640 = 5.1 ma. Therefore this transistor is indeed fully saturated; it is turned on as hard as it can be.

With a logic 1 input, then, this circuit produces a logic 0 output. We have already seen that a logic 0 input will produce a logic 1 output. Hence, this is a basic inverter circuit.

As we can see from the above calculations, the amount of current provided to the base of the transistor is far more than is necessary to drive the transistor into saturation. Therefore, we have the possibility of using one output to drive multiple inputs of other gates, and of having gates with multiple input resistors. Such a circuit is shown to the right.

In this circuit, we have four input resistors. Raising any one input to +3.6 volts will be sufficient to turn the transistor on, and applying additional logic 1 (+3.6 volt) inputs will not really have any appreciable effect on the output voltage. Remember that the forward bias voltage on the transistor's base will not exceed 0.65 volt, so the current through a grounded input resistor will not exceed 0.65v/470 = 1.383 ma. This does provide us with a practical limit on the number of allowable input resistors to a single transistor, but doesn't cause any serious problems within that limit.

The RTL gate shown above will work, but has a problem due to possible signal interactions through the multiple input resistors. A better way to implement the NOR function is shown to the left.

Here, each transistor has only one input resistor, so there is no interaction between inputs. The NOR function is performed at the common collector connection of all transistors, which share a single collector load resistor.

This is in fact the pattern for all standard RTL ICs. The very commonly-used �L914 is a dual two-input NOR gate, where each gate is a two-transistor version of the circuit to the left. It is rated to draw 12 ma of current from the 3.6V power supply when both outputs are at logic 0. This corresponds quite well with the calculations we have already made.

Standard fan-out for RTL gates is rated at 16. However, the fan-in for a standard RTL gate input is 3. Thus, a gate can produce 16 units of drive current from the output, but requires 3 units to drive an input. There are low-power versions of these gates that increase the values of the base and collector resistors to 1.5K and 3.6K, respectively. Such gates demand less current, and typically have a fan-in of 1 and a fan-out of 2 or 3. They also have reduced frequency response, so they cannot operate as rapidly as the standard gates. To get greater output drive capabilities, buffers are used. These are typically inverters which have been designed with a fan-out of 80. They also have a fan-in requirement of 6, since they use pairs of input transistors to get increased drive.

We can get a NAND function in either of two ways. We can simply invert the inputs to the NOR/OR gate, thus turning it into an AND/NAND gate, or we can use the circuit shown to the right.

In this circuit, each transistor has its own separate input resistor, so each is controlled by a different input signal. However, the only way the output can be pulled down to logic 0 is if both transistors are turned on by logic 1 inputs. If either input is a logic 0 that transistor cannot conduct, so there is no current through either one. The output is then a logic 1. This is the behavior of a NAND gate. Of course, an inverter can also be included to provide an AND output at the same time.

The problem with this NAND circuit stems from the fact that transistors are not ideal devices. Remember that 0.3 volt collector saturation voltage? Ideally it should be zero. Since it isn't, we need to look at what happens when we "stack" transistors this way. With two, the combined collector saturation voltage is 0.6 volt -- only slightly less than the 0.65 volt base voltage that will turn a transistor on.

If we stack three transistors for a 3-input NAND gate, the combined collector saturation voltage is 0.9 volt. This is too high; it will promote conduction in the next transistor no matter what. In addition, the load presented by the upper transistor to the gate that drives it will be different from the load presented by the lower transistor. This kind of unevenness can cause some odd problems to appear, especially as the frequency of operation increases. Because of these problems, this approach is not used in standard RTL ICs.

Diode-Transistor Logic

As we said in the page on diode logic, the basic problem with DL gates is that they rapidly deteriorate the logical signal. However, they do work for one stage at a time, if the signal is re-amplified between gates. Diode-Transistor Logic (DTL) accomplishes that goal.

The gate to the right is a DL OR gate followed by an inverter such as the one we looked at in the page on resistor-transistor logic. The OR function is still performed by the diodes. However, regardless of the number of logic 1 inputs, there is certain to be a high enough input voltage to drive the transistor into saturation. Only if all inputs are logic 0 will the transistor be held off. Thus, this circuit performs a NOR function.

The advantage of this circuit over its RTL equivalent is that the OR logic is performed by the diodes, not by resistors. Therefore there is no interaction between different inputs, and any number of diodes may be used. A disadvantage of this circuit is the input resistor to the transistor. Its presence tends to slow the circuit down, thus limiting the speed at which the transistor is able to switch states.

At first glance, the NAND version shown on the left should eliminate this problem. Any logic 0 input will immediately pull the transistor base down and turn the transistor off, right?

Well, not quite. Remember that 0.65 volt base input voltage for the transistor? Diodes exhibit a very similar forward voltage when they're conducting current. Therefore, even with all inputs at ground, the transistor's base will be at about 0.65 volt, and the transistor can conduct.

To solve this problem, we can add a diode in series with the transistor's base lead, as shown to the right. Now the forward voltage needed to turn the transistor on is 1.3 volts. For even more insurance, we could add a second series diode and require 1.95 volts to turn the transistor on. That way we can also be sure that temperature changes won't significantly affect the operation of the circuit.

Either way, this circuit will work as a NAND gate. In addition, as with the NOR gate, we can use as many input diodes as we may wish without raising the voltage threshold. Furthermore, with no series resistor in the input circuit, there is less of a slowdown effect, so the gate can switch states more rapidly and handle higher frequencies. The next obvious question is, can we rearrange things so the NOR gate can avoid that resistor, and therefore switch faster as well?

The answer is, Yes, there is. Consider the circuit shown to the left. Here we use separate transistors connected together. Each has a single input, and therefore functions as an inverter by itself. However, with the transistor collectors connected together, a logic 1 applied to either input will force the output to logic 0. This is the NOR function.

We can use multiple input diodes on either or both transistors, as with the DTL NAND gate. This would give us an AND-NOR function, and is useful in some circumstances. Such a construction is also known an an AOI (for AND-OR-INVERT) circuit.

Transistor-Transistor Logic

With the rapid development of integrated circuits (ICs), new problems were encountered and new solutions were developed. One of the problems with DTL circuits was that it takes as much room on the IC chip to construct a diode as it does to construct a transistor. Since "real estate" is exceedingly important in ICs, it was desirable to find a way to avoid requiring large numbers of input diodes. But what could be used to replace many diodes?

Well, looking at the DTL NAND gate to the right, we might note that the opposed diodes look pretty much like the two junctions of a transistor. In fact, if we were to have an inverter, it would have a single input diode, and we just might be able to replace the two opposed diodes with an NPN transistor to do the same job.

In fact, this works quite nicely. The figure to the left shows the resulting inverter.

In addition, we can add multiple emitters to the input transistor without greatly increasing the amount of space needed on the chip. This allows us to construct a multiple-input gate in almost the same space as an inverter. The resulting savings in real estate translates to a significant savings in manufacturing costs, which in turn reduces the cost to the end user of the device.

One problem shared by all logic gates with a single output transistor and a pull-up collector resistor is switching speed. The transistor actively pulls the output down to logic 0, but the resistor is not active in pulling the output up to logic 1. Due to inevitable factors such as circuit capacitances and a characteristic of bipolar transistors called "charge storage," it will take a certain amount of time for the transistor to turn completely off and the output to rise to a logic 1 level. This limits the frequency at which the gate can operate.

The designers of commercial TTL IC gates reduced that problem by modifying the output circuit. The result was the "totem pole" output circuit used in most of the 7400/5400 series TTL ICs. The final circuit used in most standard commercial TTL ICs is shown to the right. The number of inputs may vary � a commercial IC package might have six inverters, four 2-input gates, three 3-input gates, or two 4-input gates. An 8-input gate in one package is also available. But in each case, the circuit structure remains the same.

CMOS Logic

CMOS logic is a newer technology, based on the use of complementary MOS transistors to perform logic functions with almost no current required. This makes these gates very useful in battery-powered applications. The fact that they will work with supply voltages as low as 3 volts and as high as 15 volts is also very helpful.

CMOS gates are all based on the fundamental inverter circuit shown to the left. Note that both transistors are enhancement-mode MOSFETs; one N-channel with its source grounded, and one P-channel with its source connected to +V. Their gates are connected together to form the input, and their drains are connected together to form the output.

The two MOSFETs are designed to have matching characteristics. Thus, they are complementary to each other. When off, their resistance is effectively infinite; when on, their channel resistance is about 200 . Since the gate is essentially an open circuit it draws no current, and the output voltage will be equal to either ground or to the power supply voltage, depending on which transistor is conducting.

When input A is grounded (logic 0), the N-channel MOSFET is unbiased, and therefore has no channel enhanced within itself. It is an open circuit, and therefore leaves the output line disconnected from ground. At the same time, the P-channel MOSFET is forward biased, so it has a channel enhanced within itself. This channel has a resistance of about 200 , connecting the output line to the +V supply. This pulls the output up to +V (logic 1).

When input A is at +V (logic 1), the P-channel MOSFET is off and the N-channel MOSFET is on, thus pulling the output down to ground (logic 0). Thus, this circuit correctly performs logic inversion, and at the same time provides active pull-up and pull-down, according to the output state.

This concept can be expanded into NOR and NAND structures by combining inverters in a partially series, partially parallel structure. The circuit to the right is a practical example of a CMOS 2-input NOR gate.

In this circuit, if both inputs are low, both P-channel MOSFETs will be turned on, thus providing a connection to +V. Both N-channel MOSFETs will be off, so there will be no ground connection. However, if either input goes high, that P-channel MOSFET will turn off and disconnect the output from +V, while that N-channel MOSFET will turn on, thus grounding the output.

The structure can be inverted, as shown to the left. Here we have a two-input NAND gate, where a logic 0 at either input will force the output to logic 1, but it takes both inputs at logic 1 to allow the output to go to logic 0.

This structure is less limited than the bipolar equivalent would be, but there are still some practical limits. One of these is the combined resistance of the MOSFETs in series. As a result, CMOS totem poles are not made more than four inputs high. Gates with more than four inputs are built as cascading structures rather than single structures. However, the logic is still valid.

Even with this limit, the totem pole structure still causes some problems in certain applications. The pull-up and pull-down resistances at the output are never the same, and can change significantly as the inputs change state, even if the output does not change logic states. The result is uneven and unpredictable rise and fall times for the output signal. This problem was addressed, and was solved with the buffered, or B-series CMOS gates.

The technique here is to follow the actual NAND gate with a pair of inverters. Thus, the output will always be driven by a single transistor, either P-channel or N-channel. Since they are as closely matched as possible, the output resistance of the gate will always be the same, and signal behavior is therefore more predictable.

One of the main problems with CMOS gates is their speed. They cannot operate very quickly, because of their inherent input capacitance. B-series devices help to overcome these limitations to some extent, by providing uniform output current, and by switching output states more rapidly, even if the input signals are changing more slowly.

Note that we have not gone into all of the details of CMOS gate construction here. For example, to avoid damage caused by static electricity, different manufacturers developed a number of input protection circuits, to prevent input voltages from becoming too high. However, these protection circuits do not affect the logical behavior of the gates, so we will not go into the details here.

One type of gate, shown to the left, is unique to CMOS technology. This is the bilateral switch, or transmission gate. It makes full use of the fact that the individual FETs in a CMOS IC are constructed to be symmetrical. That is, the drain and source connections to any individual transistor can be interchanged without affecting the performance of either the transistor itself or the circuit as a whole.

When the N- and P-type FETs are connected as shown here and their gates are driven from complementary control signals, both transistors will be turned on or off together, rather than alternately. If they are both off, the signal path is essentially an open circuit � there is no connection between input and output. If they are both on, there is a very low-resistance connection between input and output, and a signal will be passed through.

What is truly interesting about this structure is that the signal being controlled in this manner does not have to be a digital signal. As long as the signal voltage does not exceed the power supply voltages, even an analog signal can be controlled by this type of gate.

Emitter-Coupled Logic is based on the use of a multi-input differential amplifier to amplify and combine the digital signals, and emitter followers to adjust the dc voltage levels. As a result, none of the transistors in the gate ever enter saturation, nor do they ever get turned completely off. The transistors remain entirely within their active operating regions at all times. As a result, the transistors do not have a charge storage time to contend with, and can change states much more rapidly. Thus, the main advantage of this type of logic gate is extremely high speed.

The schematic diagram shown here is taken from Motorola's 1000/10,000 series of MECL devices. This particular circuit is of one 4-input OR/NOR gate. Standard voltages for this circuit are -5.2 volts (VEE) and ground (VCC). Unused inputs are connected to VEE. The bias circuit at the right side, consisting of one transistor and its associated diodes and resistors, can handle any number of gates in a single IC package. Typical ICs include dual 4-input, triple 3-input, and quad 2-input gates. In each case, the gates themselves differ only in how many input transistors they have. A single bias circuit serves all gates.

In operation, a logical ouput changes state by only 0.85 volt, from a low of -1.60 volts to a high of -0.75 volt. The internal bias circuit supplies a fixed voltage of -1.175 volts to the bias transistor in the differential amplifier. If all inputs are at -1.6 volts (or tied to VEE), the input transistors will all be off, and only the internal differential transistor will conduct current. This reduces the base voltage of the OR output transistor, lowering its output voltage to -1.60 volts. At the same time, no input transistors are affecting the NOR output transistor's base, so its output rises to -0.75 volt. This is simply the emitter-base voltage, VBE, of the transistor itself. (All transistors are alike within the IC, and are designed to have a VBE of 0.75 volt.)

When any input rises to -0.75 volt, that transistor siphons emitter current away from the internal differential transistor, causing the outputs to switch states.

The voltage changes in this type of circuit are small, and are dictated by the VBE of the transistors involved when they are on. Of greater importance to the operation of the circuit is the amount of current flowing through various transistors, rather than the precise voltages involved. Accordingly, Emitter-Coupled Logic is also known as Current Mode Logic (CML). This is not the only technology to implement CML by any means, but it does fall into that general description. In any case, this leads us to a major drawback of this type of gate: it draws a great deal of current from the power supply, and hence tends to dissipate a significant amount of heat.

To minimize this problem, some devices such as frequency counters use an ECL decade counter at the input end of the circuitry, followed by TTL or high-speed CMOS counters at the later digit positions. This puts the fast, expensive IC where it is absolutely required, and allows us to use cheaper ICs in locations where the signal will never be at that high a frequency

Communications Theory

Transforms

The following two transforms are critical to electronics calculation. The Laplace transform provides a framework for filter design and frequency response calculations. The Fourier transform allows you to examine time domain waveforms in the frequency domain. Primarily used to identify the transfer function of systems, these transforms are used somewhat interchangeably. The Fourier Transform has the advantage of being numerically calculable under certain circumstances.

Laplace

Laplace Transform - The Laplace transform creates a different data space, often known as the s-domain, to manipulate functions. These functions, in electronics, represent realizable circuits. The definition of the transform is: EQ XXX This transform makes dealing with integrals and derivatives quite simple, which is why it is popular for analyzing circuits containing inductors and capacitors. Example: EQ XXX defines an exponential decay with the equation: EQ XXX where EQ XXX is the time constant of the waveform.

When transformed into the s-domain, circuits are expressed in terms of zeroterms/ pole-terms. The roots of the various equations provide the location of the �3dB corners for the elements. Non-real roots can cause oscillatory behavior.

The common transfer function H(s) is based upon Laplace Tranforms. Tables of common Laplace Transforms are available on-line or in most texts covering the subject.

S-domain equations are readily converted into z-domain equations, which are the basic descriptors of DSP operations.

Euler�s Identity - Euler�s identity shows the relationship between polar and rectangular coordinates in the imaginary plane: EQ XXX This identity is useful to keep in mind when interpreting the formulas defining Fourier Analysis.

Fourier

Fourier Transform - The Fourier Transform is similar to the Laplace transform in operation. However, unlike the Laplace transform, the Fourier transform can be implemented for repetitive signals. The Fourier Transform proves that any waveform, no matter its shape, can be described as a sum of sinusoidal waveforms of various frequencies and magnitudes. Non-repetitive waveforms require an infinite sum of sinusoids over a continuous frequency band (hence the integral) to be described exactly. Repetitive waveforms require an infinite sum of sinusoids at discrete frequency intervals (hence the summation) to be exactly. While an infinite sum of sinusoids is required in either case to achieve mathematical perfection, it is generally the case that a limited set of the Fourier terms dominate the behavior of the waveform, and it is often true that some of the terms are equal to zero. It is therefore possible to make useful approximations by only considering the �relevant� Fourier terms. The finite bandwidth of a system guarantees that some possible terms will be irrelevant since they are outside the passband. The Fourier transform is defined as: EQ XXX The Fourier transform of an impulse provides constant amplitude stimulus at all frequencies. Thus you can look at the response and determine the transfer function.

A simplification for repetitive waveforms is of period 2 EQ XXX : EQ XXX where: EQ XXX EQ XXX EQ XXX This later equation basically states that a repetitive waveform can be represented as the sum of a number of sine functions. The sine and cosine terms effectively create a single function at a phase shift, so there can be many ways to represent this equation. Applying Euler�s identity to Fourier transform expands it into a series of sine and cosine terms suggesting the commonality with the Fourier series.

H (EQ XXX) transfer functions are expected to be Fourier functions. Comparison of the definitions of H(s) and H (EQ XXX) suggest that they are very similar for all common electronic uses.

Z-transform

Modulation

AM

FM

PCM

FSK

QAM

Semiconductors

1.0 Active

1.1	Diodes

1.1.1 Standard 1.1.2 Avalanche 1.1.3 Shotky 1.1.4 LEDs

1.2	Transistors

1.2.1 NPN 1.2.2 PNP

1.3	FETs

1.3.1 P Channel 1.3.2 N Channel

1.4	Other Discrete Semiconductors

1.4.1 SCRs 1.4.2 Triacs 1.4.3 UJT

Semiconductor Notes

--- http://www.play-hookey.com/semiconductors/ --- Semiconductor Devices

These pages are intended to describe the basic structure and general properties of semiconductor devices. We will not be showing such devices in working circuits in this set of pages; other pages already under development will serve that purpose. However, I have received a number of inquiries on the order of "What is a MOSFET?" and "What's inside a transistor?" This set of pages is intended to answer such questions.

In some cases we'll be dealing with some rather technical terms, and we will sometimes have to deal with some essential concepts involved in physics. More general explanations and definitions will also be given, so if you don't need the technical definitions, don't worry about them. The terms are present in case you actually need them.

These pages will begin with basic semiconductor structure and what happens when impurities are added to a pure silicon crystal through a process known as "doping." We'll look at what happens when two or three different regions are created within a single silicon crystal. Then we'll start to look at variations: field-effect devices, devices with four and even five different regions, and finally the kinds of effects we can get when we change the amount of impurities within the crystal.

If a new semiconductor device is invented, I will add it to the site as soon as I do the necessary research. And if you are interested in a device that is not listed, by all means ask for it. Especially as these pages are first introduced, they may well not be complete. --- Basic Semiconductor Crystal Structure

To understand how diodes, transistors, and other semiconductor devices can do what they do, it is first necessary to understand the basic structure of all semiconductor devices. Early semiconductors were fabricated from the element Germanium, but Silicon is preferred in most modern applications.

The crystal structure of pure silicon is of course 3-dimensional, but that is difficult to display or to see, so the image to the left is often used to represent the crystal structure of silicon. For you physics types, silicon (and germanium) falls in column IVa of the Periodic Table. This is the carbon family of elements. The essential characteristic of these elements is that each atom has four electrons to share with adjacent atoms in forming bonds.

While this is an oversimplified description, the nature of a bond between two silicon atoms is such that each atom provides one electron to share with the other. The two electrons thus shared are in fact shared equally between the two atoms. This type of sharing is known as a covalent bond. Such a bond is very stable, and holds the two atoms together very tightly, so that it requires a lot of energy to break this bond.

For those who are interested, the actual bonds in a 3-dimensional silicon crystal are arranged at equal angles from each other. If you visualize a tetrahedron (a pyramid with three points on the ground and a fourth point sticking straight up) with the atom centered inside, the four bonds will be directed towards the points of the tetrahedron.

Now we have our silicon crystal, but we still don't have a semiconductor. In the crystal we saw above, all of the outer electrons of all silicon atoms are used to make covalent bonds with other atoms. There are no electrons available to move from place to place as an electrical current. Thus, a pure silicon crystal is quite a good insulator. In fact, it is almost glass, which is silicon dioxide. A crystal of pure silicon is said to be an intrinsic crystal.

To allow our silicon crystal to conduct electricity, we must find a way to allow some electrons to move from place to place within the crystal, in spite of the covalent bonds between atoms. One way to accomplish this is to introduce an impurity such as Arsenic or Phosphorus into the crystal structure, as shown to the right. These elements are from column Va of the Periodic Table, and have five outer electrons to share with other atoms. In this application, four of these five electrons bond with adjacent silicon atoms as before, but the fifth electron cannot form a bond. This electron can easily be moved with only a small applied electrical voltage. Because the resulting crystal has an excess of current-carrying electrons, each with a negative charge, it is known as "N-type" silicon.

This construction does not conduct electricity as easily and readily as, say, copper or silver. It does exhibit some resistance to the flow of electricity. It cannot properly be called a conductor, but at the same time it is no longer an insulator. Therefore, it is known as a semiconductor.

While this effect is interesting, it still isn't particularly useful by itself. A plain carbon resistor is easier and cheaper to manufacture than a silicon semiconductor one. We still don't have any way to actually control an electrical current.

But wait a moment! We obtained a semiconductor material by introducing a 5-electron impurity into a matrix of 4-electron atoms. (For you physics types, we're only looking at the outer electrons that are available for bonding -- electrons in inner shells are not included in the process or in this discussion.) What happens if we go the other way, and introduce a 3-electron impurity into such a crystal? Suppose we introduce some Aluminum (from column IIIa in the Periodic Table) into the crystal, as shown to the left? We could also try Gallium, which is also in column IIIa right under aluminum. Now what?

These elements only have three electrons available to share with other atoms. Those three electrons do indeed form covalent bonds with adjacent silicon atoms, but the expected fourth bond cannot be formed. A complete connection is impossible here, leaving a "hole" in the structure of the crystal.

Experimentation shows that there is an empty place where an electron should logically go, and often an electron will try to move into that space to fill it. However, the electron filling the hole had to leave a covalent bond behind to fill this empty space, and therefore leaves another hole behind as it moves. Yet another electron may move into that hole, leaving another hole behind, and so forth. In this manner, holes appear to move as positive charges through the crystal. Therefore, this type of semiconductor material is designated "P-type" silicon.

By themselves, P-type semiconductors are no more useful than N-type semiconductors. The truly interesting effects begin when the two are combined in various ways, in a single crystal of silicon. The most basic and obvious combination is a single crystal with an N-type region at one end and a P-type region at the other. A crystal with two regions as described is known as a semiconductor diode, and is the topic of the next page. --- The PN Junction

We've seen that it is possible to turn a crystal of pure silicon into a moderately good electrical conductor by adding an impurity such as arsenic or phosphorus (for an N-type semiconductor) or aluminum or gallium (for a P-type semiconductor). By itself, however, a single type of semiconductor material isn't very useful. Useful applications start to happen only when a single semiconductor crystal contains both P-type and N-type regions. Here we will examine the properties of a single silicon crystal which is half N-type and half P-type.

Consider the silicon crystal represented to the right. Half is N-type while the other half is P-type. We've shown the two types separated slightly, as if they were two separate crystals. The free electrons in the N-type crystal are represented by small black circles with a "-" sign inside to indicate their polarity. The holes in the P-type crystal are shown as small white circles with a "+" inside.

In the real world, it isn't possible to join two such crystals together usefully. Therefore, a practical PN junction can only be created by inserting different impurities into different parts of a single crystal. So let's see what happens when we join the N- and P-type crystals together, so that the result is one crystal with a sharp boundary between the two types.

You might think that, left to itself, it would just sit there. However, this is not the case. Instead, an interesting interaction occurs at the junction. The extra electrons in the N region will seek to lose energy by filling the holes in the P region. This leaves an empty zone, or depletion region as it is called, around the junction as shown to the right. This action also leaves a small electrical imbalance inside the crystal. The N region is missing some electrons so it has a positive charge. Those electrons have migrated to fill holes in the P region, which therefore has a negative charge. This electrical imbalance amounts to about 0.3 volt in a germanium crystal, and about 0.65 to 0.7 volt in a silicon crystal. This will vary somewhat depending on the concentration of the impurities on either side of the junction.

Unfortunately, it is not possible to exploit this electrical imbalance as a power source; it doesn't work that way. However, we can apply an external voltage to the crystal and see what happens in response. Let's take a look at the possibilities.

Suppose we apply a voltage to the outside ends of our PN crystal. We have two choices. In this case, the positive voltage is applied to the N-type material. In response, we see that the positive voltage applied to the N-type material attracts any free electrons towards the end of the crystal and away from the junction, while the negative voltage applied to the P-type end attracts holes away from the junction on this end. The result is that all available current carriers are attracted away from the junction, and the depletion region grows correspondingly larger. There is no current flow through the crystal because all available current carriers are attracted away from the junction, and cannot cross. (We are here considering an ideal crystal -- in real life, the crystal can't be perfect, and some leakage current does flow.) This is known as reverse bias applied to the semiconductor crystal.

Here the applied voltage polarities have been reversed. Now, the negative volatge applied to the N-type end pushes electrons towards the junction, while the positive voltage at the P-type end pushes holes towards the junction. This has the effect of shrinking the depletion region. As the applied voltage exceeds the internal electrical imbalance, current carriers of both types can cross the junction into the opposite ends of the crystal. Now, electrons in the P-type end are attracted to the positive applied voltage, while holes in the N-type end are attracted to the negative applied voltage. This is the condition of forward bias.

Because of this behavior, an electrical current can flow through the junction in the forward direction, but not in the reverse direction. This is the basic nature of an ordinary semiconductor diode.

It is important to realize that holes exist only within the crystal. A hole reaching the negative terminal of the crystal is filled by an electron from the power source and simply disappears. At the positive terminal, the power supply attracts an electron out of the crystal, leaving a hole behind to move through the crystal toward the junction again.

In some literature, you might see the N-type connection designated the cathode of the diode, while the P-type connection is called the anode. These designations come from the days of vacuum tubes, but are still in use. Electrons always move from cathode to anode inside the diode.

One point that needs to be recognized is that there is a limit to the magnitude of the reverse voltage that can be applied to any PN junction. As the applied reverse voltage increases, the depletion region continues to expand. If either end of the depletion region approaches its electrical contact too closely, the applied voltage has become high enough to generate an electrical arc straight through the crystal. This will destroy the diode.

It is also possible to allow too much current to flow through the diode in the forward direction. The crystal is not a perfect conductor, remember; it does exhibit some resistance. Heavy current flow will generate some heat within that resistance. If the resulting temperature gets too high, the semiconductor crystal will actually melt, again destroying its usefulness.

Always be careful to pay attention to the maximum specifications of a diode, and be sure to keep the operating conditions of the diode well within the indicated limits. --- The Transistor

While a single PN junction is useful, it also has its limitations. It can either conduct currrent or not, but can't really control how much current it will conduct.

So what happens if we add a second junction? Can we play around with that idea and see where it goes?

A basic two-junction semiconductor must necessarily have one type of region sandwiched between two of the other type. To the right is an example of a semiconductor device consisting of a narrow P-type region between two N-type regions. For reasons we will see shortly, the three regions are designated the emitter (E), base (B), and collector (C), respectively. In modern versions of this device, the emitter region is heavily doped with the appropriate impurity, while the base region is very lightly doped. The collector region has a moderate doping level so it will have a low internal resistance.

We have shown a device consisting of N, P, and N regions in order, but there is no reason not to build equivalent devices in P, N, and P order instead. In fact, it is often very useful to have both types of devices available.

With no electrical voltages applied, of course, this semiconductor will of course just sit there and do nothing. So let's move forward and see what happens when we apply bias voltages to the device.

To the left we see the same semiconductor device as above, with a small forward bias applied to the emitter-base junction, and a larger reverse bias applied to the collector-base junction. As we will see, these are the normal operating conditions of this device.

Since we already know how a single-junction device, the diode, behaves, we would normally expect the base voltage to be about 0.65 to 0.7 volt positive with respect to the emitter, and to have electrons move from emitter to base, and leave the device at that point. With the collector junction reverse biased, we would expect no current to flow through that junction.

But a funny thing happens inside the base region. The forward bias on this junction does indeed attract electrons from the emitter into the base, but there the forward momentum of the electrons carries them across most of the base region and into the depletion region around the collector junction. From there, the higher positive collector voltage attracts these electrons across the collector junction and into the collector region. (Remember that the electrons are minority current carriers within the P-type pase region, and can therefore cross the reverse-biased junction as a leakage current.)

A small amount of current does still leave the device through the base contact, but most of the current is diverted through the collector instead. In this way, the small base bias current controls the much larger collector current. If a small varying current is applied to the base along with the bias, the collector current will vary to a much greater degree. Thus, this device can not only be used to control a varying signal; it can amplify that signal as well.

Because of the way this device operates to transfer current (and its internal resistances) from the original conduction path to another, it's name is a combination of the words "transfer" and "resistor:" transistor.

It's also quite possible to build a transistor with the region types reversed, as shown to the right. In this case, holes will be drawn from the emitter into the base region by the forward bias, and will then be pulled into the collector region by the higher negative bias. Otherwise, this device works the same way and has the same general properties as the one described above.

To distinguish between the two types of transistors, we refer to them by the order in which the different regions appear. Thus, this is a PNP transistor while the device described above is an NPN transistor. --- The Junction FET

Suppose we take a basic pn junction and change its shape. Let's enlarge the n-type section and make two connections to it, thus treating it essentially as a semiconductor resistance. However, we will also leave the pn junction in place, centered along the n-type section as showm. The n-type section is known as the channel, and the two ends are known as the source and drain. The connection to the p-type region is known as the gate, for reasons that we will see shortly.

The depletion region at the junction spreads into the channel as shown. If no voltage is applied to any part of the device, the depletion region remains of a moderate size, and of course no current flows through any part of the device.

In normal usage, a voltage is applied across the channel, with the drain being made positive with respect to the source. Thus, electrons will move through the n-type channel from source to drain, with the applied voltage and the resistance of the channel determining the magnitude of current flowing, in accordance with Ohm's Law. There is one caveat to this, however: the depletion region in the middle of the channel will not carry current. Therefore, the effective width of the channel is restricted by the depleion region, and its effective resistance is higher in this part of the channel, than in any other part of the channel.

If the gate becomes forward biased with respect to the channel, of course, the depletion region shrinks away and no longer controls the flow of current through the channel. This is not generally useful in practical electronic circuits.

However, if the gate becomes reverse biased with respect to the channel, the applied electric field will enlarge the depletion region, as shown to the left. As a result, the working channel width is reduced, and the effective channel resistance is increased significantly. In this manner, a small voltage applied to the gate can have a profound effect on the current flowing through the channel. Indeed, if the applied reverse bias becomes high enough, the depletion region can cover the entire width of the channel, and cut off current flow completely.

Because the electric field produced by the applied gate voltage controls the resistance of the channel (and therefore the current flowing through the channel), this device is known as a field-effect transistor (FET). In addition, because the control voltage at the gate is applied to a pn junction, and because the channel is made of n-type semiconductor material, the device is properly called an n-channel junction field-effect transistor, or n-channel JFET.

It is quite possible to reverse the semiconductor regions, in which case we would have a p-channel JFET. Of course, the applied voltages must be reversed in polarity for a p-channel device, and the current carriers within the p-type channel are holes rather than electrons. Otherwise, the basic behavior of the device is the same.

If the channel has a uniform concentration of impurities and the gate is placed in the middle of the channel, the FET is said to by symmetrical. In this case, the source and drain are interchangeable, which can be useful in some applications. However, many FETs are deliberately constructed to be unsymmetrical, to enhance certain parameters and behaviors. In these FET types, performance will be impaired if source and drain are interchanged.

JFETs, like any semiconductor device, have their advantages and disadvantages. Since they are controlled by the applied gate voltage, they draw no gate current (except for a small leakage current, which can be a disadvantage), and hence present a very high input resistance to any signal source. In addition, the reverse-biased junction can take a considerable amount of radiation damage without any appreciable change to the FET operation. This makes the JFET an excellent choice for operation in high-radiation environments. --- The Depletion Mode MOSFET

In the page on junction FETs, we noted that the electric field associated with a reverse-biased pn junction creates a depletion region within the channel, which restricts the flow of electricity through the channel. The stronger the field, the larger the depletion zone, and the greater the restriction of the channel.

However, an electric field is associated with any electrical charge, and not only with a pn junction. Can we then take our channel and somehow just use a metal gate, while insulating the gate from the channel? Let's see what happens when we try.

First, we note that the main ingredient of the channel is silicon. It can be a p-type or n-type channel; it is still mostly silicon. Next, we take note that silicon dioxide is simply glass, which is a good insulator. So we can form a thin layer of silicon dioxide along one surface of the channel, and then lay our metal gate region down over the glass. The result is shown to the left.

This device is sometimes known as an insulated-gate field effect transistor, or IGFET. More commonly, noting the construction of the gate, it is called a metal-oxide-semiconductor FET, or MOSFET.

With no voltage applied to the gate (G) electrode, the channel really is just a semiconductor resistance, and will conduct current according to the voltage applied between source (S) and drain (D). There is no pn junction, so there is no depletion region.

With an appropriate voltage applied between source and drain, current will flow through the channel, as a semiconductor resistance. However, if we now apply a negative voltage to the gate, as shown to the right, it will amount to a small negative static charge on the gate. This negative voltage will repel electrons, with their negative charge, away from the gate. But free electrons are the majority current carriers in the n-type silicon channel. By repelling them away from the gate region, the applied gate voltage creates a depletion region around the gate area, thus restricting the usable width of the channel just as the pn junction did.

Because this type of FET operates by creating a depletion region within an existing channel, it is called a depletion-mode MOSFET.

The basic advantage of the MOSFET is that it draws no gate current at all; not even a leakage current. Thus, the input resistance of this device is essentially infinite. However, that also leads to a couple of disadvantages: that thin layer of glass can't withstand much voltage; even the static charge you can build on your body walking across a rug when the air is dry is enough to destroy the device if it isn't mounted in a circuit that will drain off the charge. To prevent such damage, individual MOSFETs are typically packaged in metal cans with four leads (the fourth lead connected to the can itself. The four leads are connected by a wire ring around them, which remains in place until the device is installed in its circuit. Then it can be cut away safely.

The second disadvantage has to do with the inherent capacitance between the gate and the channel. It may not seem like much, but it does limit the frequency response in analog circuits, or the maximum switching speed in digital circuits. --- The Enhancement Mode MOSFET

Both the junction FET and the depletion mode MOSFET operate in a generally intuitive manner. In both device types, an electric field is used to deplete the channel of current carriers to one degree or another, so that a control voltage will directly affect and control the amount of current flowing through the channel. But what happens if we have a device with no working channel, but with room to put a channel in place. Can we generate a channel electrically?

The mechanical structure of this device is shown to the right. In an IC, we would place two n-type regions side by side within a p-type area and then place the gate between the n-type regions. However, the important region still consists of the two n-type regions and the p-type area between them. This is the portion we have depicted to the right.

With no applied bias, we have what amounts to an npn transistor with no base connection. The two n-type regions are isolated from each other, and are electrically separate. Even with a voltage applied between the two n-type regions, there is no channel present and no current flow.

While we still apply the usual positive voltage to the drain with respect to the source, this time we will also apply a positive voltage to the gate region. This has the effect of attracting free electrons towards the gate. The larger the positive gate voltage, the wider its electric field and the more free electrons it will attract.

You might not think this would have any effect on the p-type region, where the majority current carriers are holes. However, there are some free electrons here as well. In addition, the source junction is forward biased, so the positive gate voltage can attract electrons across this junction towards the gate.

The net result is that the electrons attracted towards the gate actually enhance a channel within the p-type region, as shown to the left. This is a channel formed of free electrons, and actually bridges the gap between source and drain. Now we have a channel, which can conduct current from source to drain through the device.

Because these devices operate by having a channel enhanced in the semiconductor material where no channel was constructed, they are known as enhancement-mode MOSFETs. It is just as easy to construct p-channel versions of these devices as n-channel versions. Indeed CMOS logic ICs consist of nothing but these devices, constructed and used in pairs such that one will be turned off while the other is turned on. This is the source of the designation CMOS: Complementary MOS.

Enhancement-mode MOSFETs have the same advantages and disadvantages as their depletion-mode cousins. However, when they are constructed as part of an IC rather than as individual devices, they are not readily subject to random static charges. Such ICs are constructed with input protection circuitry for any MOSFET input that must be made accessible to external circuitry. --- The Four-Layer Diode

If we add a junction to a transistor, we get a four-layer device. At first glance, this may seem either useless or counter-productive, but this is not the case.

The diagram to the right shows the structure and nomenclature of the four-layer diode, together with its equivalent structure, showing its logical behavior and its schematic symbol. Rather than acting simply as an odd sort of diode, this device actually behaves as two transistors, interconnected back-to-back as shown. The external connections are designated the cathode (n-type connection) and anode (p-type connection). This keeps us from having to distinguish between the n-emitter and the p-emitter.

In operation, the device is placed in a circuit so that the anode is held positive with respect to the cathode. If this voltage polarity is reversed, the four-layer diode exhibits two reverse-biased junctions and will not conduct current.

The applied voltage appears mainly across the reverse-biased center junction of the device, and the quiescent current flowing through the device is quite small, consisting essentially of a leakage current. As the applied voltage increases slowly, the leakage curent increases slowly as well, until the applied voltage reaches a certain level. At this voltage, known as the breakover voltage or firing voltage of the device, the two logical transistors both turn on and current increases dramatically. At the same time, the voltage across the diode decreases to almost zero, and the applied voltage now appears across whatever load circuit or device is connected in series with the diode. The diode has just switched from its off (or blocking) state to its on state.

Once the four-layer diode is conducting, it will continue to conduct as long as current continues to flow. It can only be turned off by reducing the circuit voltage and/or current to below the levels required to sustain conduction. Typically, this means either removing power totally from the circuit, or else using the diode as a device to periodically discharge a capacitor.

The breakover voltage and current-handling capacity of a given four-layer diode are determined by the exact details of its manufacture. Four-layer diodes may be manufactured with a wide range of voltage and current ratings.

There is one problem which can appear with the four-layer diode: if the applied voltage rises rapidly, the inherent capacitance associated with the reverse-biased middle junction will transmit the applied voltage more directly, and cause the diode to switch on at a voltage well below its designed breakover voltage. This phenomenon is known as the rate effect.

Applications for the four-layer diode fall into two categories. In active cirucits, they can be used as the active element in a sawtooth waveform generator or triggered pulse generator. Or, they can be used as a "crowbar" element in a power supply. In this last application, the four-layer diode is placed directly across the output terminals of the power supply, used to power delicate circuitry. If the supply voltage should rise for any reason to a level that might damage the circuitry, the four-layer diode breaks over and draws a heavy current from the supply. This overloads the supply and causes the fuse or circuit breaker to blow. It's a drastic measure, but still much better than allowing expensive circuit components to be damaged or destroyed. --- The Silicon Controlled Rectifier

The basic four-layer diode has a number of useful properties and capabilities, but would become even more useful if it could be more accurately controlled. To do this, however, we must gain access to more than just the outer ends of the device.

The four-layer construction shown to the right is known as a Silicon Controlled Rectifier, or SCR. To form it, we have added a connection to the p-type region next to the cathode. This connection is known as the gate.

If we ground both the cathode and the gate, and apply a positive voltage to the anode, no current will flow through this device. This is in keeping with the basic four-layer diode. In this case, however, we will not allow the applied anode voltage to exceed the SCR breakover voltage. Thus, if nothing happens, the SCR will remain turned off indefinitely.

However, if we now apply a small positive voltage to the gate lead sufficiently to forward bias the cathode junction, the device will immediately turn fully on. Again, this is in keeping with the behavior of the basic four-layer diode. The difference is that we can accurately control the timing and the applied gate voltage, if necessary. Thus, we can determine the conditions under which the SCR will fire more accurately than we can for the basic four-layer diode.

A modern application for the SCR is the "cyclops" brake light on all cars now sold in the USA. This circuit, as shown in the schematic diagram to the right, uses two SCRs cross-connected with each other (each gate connected to the other SCR's anode) and triggered from the regular brake lights on either side of the rear of the vehicle. The lights are connected to the two cathodes, which are connected together so that either SCR can keep both lights on once they are triggered. If only one SCR is triggered (as when you use a turn signal), the triggered SCR gets no anode voltage from the opposite brake light, so the "cyclops" light remains off. Only if both brake lights are on together will the "cyclops" turn on. Once it does, it remains on regardless of turn signals as long as the brake is applied. When you release the brake, power is removed from the "cyclops" as well as from the brake lights and they all turn off.

The two resistors have a relatively high resistance, and are not critical in any case. They ensure that the gates of the two SCRs are held off while the brake lights are unpowered. The resulting circuit is simple and inexpensive, yet quite robust and easily able to handle the bumps and jolts of an automotive environment.

Another practical application is in a telephone "hold" circuit. Triggering the SCR causes the circuit to contiuously draw current through the telephone wires, thus causing the switching station to assume a phone is still in use. You must hang up the phone while still pressing the button in order to ensure that the SCR remains triggered. Picking up the same or another receiver in the house reduces the current through the SCR enough that it turns off.

You can use multiple copies of this circuit. However, only the LED on the active "hold" circuit will light up. Also, pressing the button while no phone is in use will engage that "hold" circuit at once, so it should be used with care. And of course you should check with your local phone company before connecting anything to the phone line. This is to protect your circuitry as much as to protect the phone company from improper and possibly damaging connections. --- The Silicon Controlled Switch

The silicon controlled switch (SCS) is the next step beyond the silicon controlled rectifier (SCR). It is still a four-layer diode, but this time all four regions are accessible to the external circuit.

The basic construction of the SCS is the same as for the SCR, with the addition of a second gate lead. We thus have an anode, a cathode, an anode gate, and a cathode gate. The equivalent circuit is the same as shown to the right, and even the schematic symbol of the SCS is similar to the SCR symbol.

The SCS has two advantages over the SCR and the four-layer diode. First, because both gate regions are accessible, they can be biased so as to completely cancel the rate effect we described with the four-layer diode. Second, since we can now control both end junctions, we can actively turn the SCS off without having to reduce the applied voltage or current. Thus, the SCS really is a switch, and can be used as one. --- The Diac and Triac

One of the drawbacks of all of the four-layer diodes is that they all require a dc voltage of the correct polarity in order to operate. It would be nice if we could have some sort of SCR that works for either polarity, so it can be used with an applied ac voltage.

Now, we created the four-layer devices by essentially connecting two transistors back to back in a single silicon crystal. Can we extend this concept and connect two SCRs back to back?

The diagram to the right shows the resulting five-layer device, which is known as a diac. At first glance, it seems unreasonable or even impossible, considering that each connection to the semiconductor crystal overlaps a pn junction. However, the device does work, and indeed works well.

The terms anode and cathode no longer apply, so the connections are simply named terminal 1 (T1) and terminal 2 (T2). Each terminal can serve as either anode or cathode, according to the polarity of the applied voltage.

That same applied polarity also determines which of the end junctions is active, and which one is bypassed. Thus, if T1 is positive with respect to T2, T1's N-type region is ignored (electrons are pulled away from that junction) and its P-type region serves as the anode. At the same time, the relative negative voltage at T2 pulls holes from the P-type region towards the terminal (removing them from the next junction), but tends to push electrons from its N-type region across that junction into the P-type region, thus making them available for conduction.

The diac, like the four-layer diode, remains non-conducting until its breakover voltage is reached, at which point it turns on fully and remains on until the applied voltage or circuit current are reduced below the holding values at which conduction can be maintained. Since the diac is normally used in ac circuits, operating as part of the control circuit for devices powered from a household wall socket or similar source, this is not a problem. In such applications, the diac is triggered each half-cycle of ac power, and then turns off at the end of the half-cycle when the line voltage reverses polarity.

The drawback of the diac is the same as it was for the four-layer diode: it cannot be triggered at just any point in the ac power cycle; it triggers at its preset breakover voltage only. If we could add a gate to the diac, we could have variable control of the trigger point, and therefore a greater degree of control over just how much power will be applied to the line-powered device.

The figure to the right shows the result. This device is known as a triac. Here, the main connections are simply named main terminal 1 (MT1) and main terminal 2 (MT2). The gate designation still applies, and is still used as it was with the SCR.

The useful feature of the triac is that it not only carries current in either direction, but the gate trigger pulse can be either polarity regardless of the polarity of the main applied voltage. The gate can inject either free electrons or holes into the body of the triac to trigger conduction either way. For this reason, you may see the triac referred to as a "four-quadrant" device.

As with the diac, the triac is used in an ac environment, so it will always turn off when the applied voltage reaches zero at the end of the current half-cycle. If we apply a turn-on pulse at some controllable point after the start of each half cycle, we can directly control what percentage of that half-cycle gets applied to the load, which is typically connected in series with MT2. This makes the triac an ideal candidate for light dimmer controls and motor speed controls. This is a common application for triacs. --- A Touch of Physics

In order to understand how diodes can have very different properties according to how they are manufactured, it is necessary to first delve a bit into the physics involved. Don't worry; we won't get any deeper in than we have to, but we have to use this method to understand the differences between different kinds of diodes, and why they can do the odd (and useful) things they do.

Consider the diagram to the right. This figure shows the important range of electron energy in four different kinds of materials. To understand this diagram, let's define a few terms. Conduction Band That range of electron energy where electrical conduction is possible. Electrons with this much energy are free of their parent atoms, and can move through the medium in which they exist.

Valence Band That range of electron energy where electrical conduction is not possible. Electrons with this much energy are bound into the atomic structure of the material, and are unavailable to conduct an electrical current.

Forbidden Zone That energy range between the valence band and the conduction band. Electrons cannot remain within this range of energy; they must either gain or lose energy so as to attain either the conduction band or the valence band.

Fermi Level The highest energy level in the crystal that can remain populated by electrons at a temperature of Absolute Zero. Electrons with greater energy than this may be available for conduction; electrons with less energy are bound to the crystal structure.

Diagram A above represents a good conductor, such as copper or silver. Here, at temperatures above Absolute Zero, electrons are always available to conduct electrical current, even with no applied energy. In metals, the valence and conduction bands actually overlap.

Diagram B shows a typical insulator, such as glass. All electrons are pretty much locked into the atomic structure, and are unavailable as current carriers. It will take a lot of energy to break any electrons loose for conduction. It's not impossible (a lightning bolt can go through almost anything), but it takes a lot of applied energy.

Diagram C represents a crystal of N-type silicon (or germanium). The forbidden zone is still present, but much smaller than for an insulator. That's why this type of material is called a "semiconductor." With the crystal doped with N-type impurities, there are lots of electrons around with almost enough energy to roam freely, so the Fermi level gets pushed up close to the conduction band. If the doping level is heavy enough (large dosage of impurities), the Fermi level can actually enter the conduction band.

Diagram D represents a P-type semiconductor crystal. Here, the p-type impurities have left holes in the atomic structure, which tend to attract and hold free electrons. This pulls the Fermi level down until it gets close to the valence band. Similar to the highly-doped N-type crystal, a highly-doped P-type crystal will have its Fermi level within the valence band instead of just above it.

There are two important factors regarding the Fermi level in semiconductors. First, since the Fermi level is close to one of the working energy levels, it requires very little energy to push an electron over the edge and make it available for conduction. In an N-type crystal, only a very small applied voltage will kick the free electrons up into the conduction band to carry a current. In a P-type crystal, a small amount of energy will kick a bound electron just over the top of the valence band into the forbidden zone. This doesn't make the electron available for bulk conduction, but does allow the applied voltage to push the electron over into a hole, causing it to leave another hole behind it. In this way, a series of electrons can "hop" from bound state to bound state in a new location, allowing the hole to appear to move in the opposite direction. This is another way to think of hole conduction in semiconductor crystals.

The second factor to remember is that when a PN junction is formed in a single silicon or germanium crystal, the entire crystal as a whole has one Fermi level (see Diagram E above). The conduction and valence bands have differing energy levels across the crystal. As a result, the N-type conduction band is very close in energy to the P-type valence band. The transition region corresponds to the depletion region within the crystal. This is a major factor in the operation of all semiconductor devices, and helps to explain how we can get specific properties from a given device, according to just how we manufacture the semiconductor crystal --- Specialized Diodes

By adjusting the doping levels and gradients as well as the geometry of a semiconductor crystal, we can modify the behavior of the device. This page lists a wide range of diodes whose properties have been deliberately controlled to produce specific capabilities.

Each of these specialized diodes has its own schematic symbol, shown to the right of its description below. The symbols are all specific variations on the basic diode symbol, so that the nature and function of the device is clear on a schematic diagram. Light Emitting Diode (LED)

One of the questions semiconductor manufacturers asked themselves was, "What happens if we increase the doping levels in the silicon crystal?" Trying this gave rise, among other things, to the tunnel diode. Then they took the process even further, to the point where they skipped the silicon completely, and produced what is called a "III-V" device, named after the fact that P-type dopants are from column III of the Periodic Table (aluminum, gallium, indium) and N-type dopants are from column V (phosphorus, arsenic).

The resulting Gallium Arsenide (GaAs) crystal had the interesting property of radiating significant amounts of infrared radiation from the junction. By adding Phosphorus to the equation, they shortened the wavelength of the emitted radiation until it became visible red light. Further refinements have given us yellow and green LEDs. More recently, blue LEDs have been produced, by putting nitrogen into the crystal structure. This makes full-color flat-screen LED displays possible.

The mechanism of emitting light is interesting. The atomic structure of the LED is carefully designed so that as free electrons cross the junction from the N-type side to the P-type side, the amount of energy each electron releases as it drops into a nearby hole corresponds to the energy of a photon of some particular color. Therefore, that photon is released as a visible photon of that color.

P-I-N Diode

The p-i-n diode doesn't actually have a junction at all. Rather, the middle part of the silicon crystal is left undoped. Hence the name for this device: p-intrinsic-n, or p-i-n. Because this device has an intrinsic middle section, it has a wide forbidden zone when unbiased. However, when a forward bias is applied, current carriers from the p- and n-type ends become available and conduct current even through the intrisic center region. The end regions are heavily doped to provide more current carriers.

The p-i-n diode is highly useful as a switch for very high frequencies. They are commonly used as microwave switches and limiters.

Tunnel Diode

As we mentioned in our discussion of semiconductor physics, the addition of either P-type or N-type impurities causes the Fermi level in the silicon crystal to shift towards the valence band (P-type impurities) or the conduction band (N-type impurities). The higher the doping level, the greater the shift. In the tunnel diode, the doping levels are so high that the Fermi levels in both halves of the crystal have been pushed completely out of the forbidden zone and into the valence and conduction bands.

As a result, at very low forward voltages, electrons don't have to gain energy to get over the Fermi level or into the conduction band; they can simply "tunnel through" the junction and appear at the other side. Furthermore, as the forward bias increases, the applied voltage shifts the levels apart, and gradually back to the more usual diode energy pattern. Over this applied forward voltage range, diode current actually decreases as applied voltage increases. Thus, over part of its operating range, the tunnel diode exhibits a negative resistance effect. This makes it useful in very high frequency oscillators and related circuitry.

Varactor Diode

One characteristic of any PN junction is an inherent capacitance. When the junction is reverse biased, increasing the applied voltage will cause the depletion region to widen, thus increasing the effective distance between the two "plates" of the capacitor and decreasing the effective capacitance.

By adjusting the doping gradient and junction width, we can control the capacitance range and the way capacitance changes with applied reverse voltage. A four-to-one capacitance range is no problem; a typical varactor diode (sometimes called a "varicap diode") might vary from 60 picofarads (pf) at zero bias down to 15 pf at 20 volts. Very careful manufacturing can get a capacitance range of up to ten-to-one, although this seems at present to be a practical limit.

Varactor diodes are used in electronic tuning systems, to eliminate the use of and need for moving parts.

Zener Diode

When the reverse voltage applied to a diode exceeds the capability of the diode to withstand it, one of two things will happen, yielding essentially the same result in either case. If the junction is wide, a process called avalanche breakdown occurs, whereby the current through the diode increases as much as the external circuit will permit. A narrow junction will experience Zener breakdown, which is a different mechanism but has the same effect.

The useful feature here is that the voltage across the diode remains nearly constant even with large changes in current through the diode. In addition, manufacturing techniques allow diodes to be accurately manufactured with breakdown voltages ranging from a few volts up to several hundred volts. Such diodes find wide use in electronic circuits as voltage regulators.

Schottky Barrier Diode

When we get into high-speed applications for electronic circuits, one of the problems exhibited by semiconductor devices is a phenomenon called charge storage. This term refers to the fact that both free electrons and holes tend to accumulate inside a semiconductor crystal while it is conducting, and must be removed before the semiconductor device will turn off. This is not a major problem with free electrons, as they have high mobility and will rapidly leave the semiconductor device. However, holes are another story. They must be filled more gradually by electrons jumping from bond to bond. Thus, it takes time for a semiconductor device to completely stop conducting. This problem is even worse for a transistor in saturation, since then by definition the base region has an excess of minority carriers, which tend to promote conduction even when the external drive is removed.

The solution is to design a semiconductor diode with no P-type semiconductor region, and therefore no holes as current carriers. Such a diode, known as a Schottky Barrier Diode, places a rectifying metal contact on one side on an N-type semiconductor block. For example, an aluminum contact will act as the P-type connection, without requiring a significant P-type semiconductor region.

This diode construction has two advantages in certain types of circuits. First, they can operate at very high frequencies, because they can turn off as fast as they can turn on. Second, they have a very low forward voltage drop. This is used to advantage in a number of ways, including as an addition to TTL ICs. When a Schottky diode is placed across the collector-base junction of a transistor as shown to the right, it prevents the transistor from becoming saturated, by bypassing the excess base current around the transistor. Therefore, the transistor can turn off faster, thus increasing the switching speed of the IC. The full power versions of these TTL ICs are the 74S00 series, and have switching speeds similar to ECL, and similar power requirements. The low power versions, the 74LS00 series, have switching times comparable to standard TTL, but with a much lower power requirement.

Experimentation is always in progress, and new applications are invented regularly. As new diode types come to my attention, I will add them to the list above. If you should hear of a diode type not yet in the list, please contact the webmaster and let me know there. I will research the device and add it as quickly as possible. Thanks. --- The Unijunction Transistor

One of the oddest semiconductor devices in use is the unijunction transistor (UJT). As its name suggests, this is a three-terminal device which nevertheless has only one PN junction. It cannot amplify an applied signal, but it nevertheless can be used as the active element in an oscillator circuit.

The figure to the right shows the physical construction of a typical UJT. It consists of a bar of N-type silicon with electrical connections at either end, plus an aluminum wire bonded to a point along the length of the silicon bar. At the bonding point, the aluminum creates a P-type region in the silicon bar, thus forming a PN junction.

Because there's only one junction, it's not reasonable to use the terms anode or cathode, so designations are taken instead from transistor notations. The P-type connection is known as the "Emitter," while the two N-type connections are designated "Base 1" and "Base 2." For this reason, the device is sometimes called a "double-base diode."

The schematic symbol for the UJT appears to the right. The symbol actually represents the construction of the UJT, as shown above, quite well.

In use, an appropriate bias voltage is applied between the two bases, with B2 made positive with respect to B1. Because the N-type bar is resistive, a relatively small current will flow through it, and the applied voltage will be distributed evenly along its length. If we start with the Emitter grounded, the junction will be reverse biased and there will be no emitter current. As the emitter voltage increases, there is no change until the junction suddenly becomes forward biased.

At this point, the emitter injects holes into the silicon bar, greatly reducing the effective resistance of the bar between E and B1. This will lower the emitter voltage required to keep the junction forward biased, and will sustain a heavy emitter current. This condition will continue as long as the circuit connected to the emitter can sustain the heavier current flow. The UJT thus behaves like a variation of the SCR, as suggested by the equivalent circuit shown to the right.

It is also possible to build a UJT with a P-type silicon bar and an N-type emitter. It isn't used as commonly, but has been constructed. It is known as a complementary UJT (CUJT); its schematic symbol is shown to the right. The CUJT behaves the same as the UJT, but with reversed voltage polarities.

Fiber Optics

Much of this information is taken from http://www.play-hookey.com/optics/

Theory

Fiber Types - Fundamentals

Optics

The scientific study of light. Physical optics is concerned with the creation, nature, and properties of light. Psychological optics pertains to the role of light in vision. Geometrical optics deals with the properties of reflection and refraction of light, as part of the study of mirrors, lenses, and optical fibers.

As you can see from the dictionary definition above, the study of optics falls into three general categories: light itself, what it is and how it behaves; How we perceive light through the sense of sight; and how light can be manipulated through such processes as reflection and refraction. Although we talk of these categories as if they were separate and distinct, actually the whole reality of sight and vision constantly involves all of these categories in various combinations.

For example, consider a rainbow. This visual phenomenon not only involves both reflection and refraction, but also is a practical demonstration that different colors of light refract differently, even under fixed circumstances. For an excellent discussion of rainbows and their characteristics, take a look at Beverly T. Lynds' site.

This set of pages is still under construction. As each discussion is completed, the appropriate links in the list below will be activated. The topics to be discussed (subject to change if needed) are: The Nature of Light. Here we explore the basic structure and behavior of light. Is light a wave or a particle? Reflection and Refraction. These are two basic methods by which we can affect and control the behavior of light. Colors and Filtering. White light is actually a mixture of all possible colors. Do different colors have slightly different properties? Lenses. How and why do lenses work to concentrate and focus light? Lasers. How can we generate light in such a way that it is all at the same wavelength and all traveling in the same direction? Fiber Optics. How can a transparent thread of glass or plastic manage to hold light within itself and transmit it from one end to the other, even around corners? Rainbows. One of the prettiest sights involving light and color, the rainbow is a special example of an optical phenomenon that has intrigued people throughout the ages.

--- What is Light?

Throughout human history, light has been something most of mankind has taken for granted. It is there throughout our lives for most of us, and (so we assume) will always be there in the familiar patterns we experienced as we grew up.

In the past, and in many countries even today, phenomena such as solar eclipses have been cause for great fear, because they represent a break in that familiar pattern, cutting off the light from the sun for awhile, and who could be sure if the sun would ever come back? Even in countries where an eclipse is an understood phenomenon, a solar eclipse is still an occasion for excitement and awe.

To gain any understanding of light itself, we need to step away from this mindset and examine light from a more scientific and objective viewpoint. Let's start with a dictionary definition of light, with some technical data included:

Light

The form of radiant energy that stimulates the organs of sight, having for normal human vision wavelengths ranging from about 3900 to 7700 �ngstroms and traveling at a speed of about 186,300 miles per second.

One �ngstrom = 10-8 cm (0.00000001 cm).

Of course, the above definition doesn't really tell us much. Before the speed of light and its wavelength in the electromagnetic spectrum were determined, the definition would have ended at the first comma, and that really would have told us nothing about the nature of light.

So, rather than look at more definitions, let's move on to explore some of the basic properties of light as we know them today, so we can better understand not only how light will behave, but also something of why it behaves as it does. This will give us a chance to predict how light may behave under various circumstances and conditions. --- Light as a Wave

The classical description of light as an electromagnetic wave makes some assumptions about its nature, based on what could be observed at the time. Although some of these assumptions have proven to be less than accurate as we learn more about electromagnetic phenomena, they make a good starting point for our discussion about light in particular and electromagnetic waves in general. The two basic assumptions were: The frequency of the electromagnetic wave can be varied over the entire positive range, but cannot be reduced to zero.

This seems intuitively obvious. A frequency of zero would mean no change in the strengths of the electric and magnetic fields. But an electromagnetic wave reqires these fields to be constantly changing in order to exist. And the idea of a negative frequency seems ludicrous. The energy in the wave is continuously variable, with a minimum energy of any non-zero value, and no maximum value.

This also seems intuitive. Looking at sunlight and comparing light intensity on a clear day and a cloudy day, we note that the clouds block some of the sun's energy. The desert sun at Noon is very intense, while the setting sun at extreme northern or southern latitudes is much less noticeable. Yet it is the same sunlight, coming from the same source, so we know that various factors encountered by sunlight must be removing some of the energy from it. We can see, feel, and scientifically measure the difference.

Of course, other properties of electromagnetic radiation have also been determined, and a number of theories and assumptions have been developed. These have been either confirmed or disproven by experiment. Before we look at the circumstances under which the wave model of light (or any electromagnetic wave) may break down, however, let's look at the wave model itself.

Since light was first recognized scientifically as a manifestation of electromagnetic energy, it can be represented as a waveform, like this:

If we think of this figure as representing the electrical energy present in the light waveform as it travels in the direction of the arrow, it looks as if the energy level is becoming alternately positive and negative, with momentary crossovers of zero electrical energy. In the basic model of light shown here, this is in fact the case; as with all electromagnetic waves, light energy is constantly changing its form between electrical energy and magnetic energy. The point of maximum magnetic energy coincides with the moment of zero electrical energy. Beyond that instant, energy shifts again from the magnetic field back into the electrical field, but with a reversal from the previous polarity. This continues as long as that particular ray of light exists.

There are other "modes" of propogation which involve more complex interactions between the electric and magnetic fields, but in all cases the Law of Conservation necessarily holds true: Energy is neither created nor destroyed as it is transformed from one form to another; the total energy in the wave must somehow remain constant throughout the full cycle.

NOTE: The sine wave shown here represents the strength and polarity of the electrical field associated with the motion of this ray of light. The light itself, assuming no outside influences, travels in the straight line indicated by the blue arrow. The light energy does not "wiggle" back and forth as it moves along its path.

As an electromagnetic wave, light has some characteristics in common with all forms of electromagnetic energy. These include wavelength, frequency, and speed of propogation. These characteristics are actually related to each other, so that any one can be calculated if the other two are known. Let's take a look at each of these characteristics:

Wavelength

Since light is a repeating waveform in motion, it is possible to measure the physical distance between matching points of adjacent cycles of the waveform. This is shown here:

The symbol used to represent this distance is the Greek letter "Lambda" ().

The wavelength can actually be measured between any two corresponding points on the waveform. It is convenient to use the most positive point or the most negative point, both of which are shown above. However, we could have just as easily specified two zero-crossing points, so long as both crossed the zero line in the same direction.

Remember that the light itself does not wave back and forth along its path of travel. What we are actually measuring here is the distance traveled through space by this ray of light, while its electrical field goes from its maximum positive value, through zero to its maximum negative value, and then through zero again to once more reach its maximum positive value.

This distance is normally measured in meters (m) or some decimal fraction of a meter, such as centimeters (cm). The correct units of measurement are meters per cycle (m/cycle) or some appropriate derivation. In the case of light, the wavelength is so short that a specific distance, called the �ngstrom (�), has been defined.

One �ngstrom = 10-10 m or 10-8 cm.

Visible light has a characteristic wavelength in the range of approximately 3900 � to 7700 �. Electromagnetic energy outside this range is no longer visible to the human eye.

Speed of Propogation

The speed at which light travels through any medium is determined by the density of that medium. The presence of matter, even transparent matter, will slow the light down. Even air will have some effect, and glass has a more significant effect on the speed at which light will travel through it.

Ever more sophisticated experiments have determined the speed of light quite accurately. According to current knowledge:

Speed of light in a vacuum = 2.997925 � 0.000002 x 1010 cm/sec.

As made famous in Einstein's equation, the letter c is used as a general symbol for the speed of light.

Frequency and Period

In any electromagnetic wave, it takes time for the energy in the wave to change from electrical format to magnetic and then back again. The amount of time required to do this twice, covering one complete cycle, or wavelength of the signal is known as the period of the wave. Thus, the period of any wave, measured as some amount of time per cycle, is in fact the time interval that corresponds to the physical wavelength of the signal.

The frequency of the wave is the inverse or reciprocal of the period. That is, the frequency is the number of cycles of the waveform that occur in one second of time. For many years this was simply measured in units of cycles per second. Recently, however, the specific name hertz (abbreviated Hz) has been designated as the appropriate unit to indicate cycles per second.

In general equations, the letter f is used to indicate frequency in hertz.

The basic mathmatical formula that relates wavelength, frequency, and the speed of light is: c = f

The wave theory of light was happily adopted and accepted until it was found to fail to explain some observed and measured phenomena, in consistent and repeatable experiments. The two phenomena that upset this model are the photoelectric effect and blackbody radiation. These two effects could only be explained by assuming that light energy propogates as a series of independent "corpuscles," or bundles. This gave rise to the more recent particle theory of light. --- Light as a Particle

While it remains true that light exhibits the properties of an electromagnetic wave as described on the page on Light as a Wave, there are other characteristics of light, discovered more recently, which imply that light also partakes of some of the properties of a physical manifestation. In this context, light behaves in some ways as if it consists of discrete particles rather than infinitely variable waves. These apparent particles have been designated photons.

Some of these characteristics are: Any single photon has a fixed, discrete energy level. Each color of light has its own unique energy level. It is not possible to increase or decrease the energy of that single photon without changing its wavelength, or else absorbing it completely and thereby ending its existence. The intensity of visible light can be increased or decreased only by changing the number of photons present. The same rules hold true for electromagnetic phenomena outside the visible range.

Actually, photons are not particles in the physical sense that we normally associate with that word. Rather, they consist of discrete bundles of energy which are fixed in magnitude. As a result, each photon takes on some of the characteristics of a physical particle.

Viewed in this context, light still does not change its basic behavior. These apparent particles are electrically neutral, so they tend to travel in straight lines, without being affected by either magnetic fields or electrical fields.

If photons were actual physical particles, we would have trouble using them to explain some of the observed behaviors of light. For example, when light passes from a vacuum to a denser medium, such as Earth's atmosphere, it slows down in accordance with the density of the medium. This much, at least, makes intuitive sense. However, light then maintains a constant speed through the new medium � it does not continue to slow down as it continues to move. This does not seem to make much sense for physical particles, which should be subject to friction effects in a non-vacuum. Furthermore, when the light leaves the denser medium for a less dense one, it speeds up again. Definitely not the behavior one would expect from any kind of particle.

But if we examine a photon as a bundle of energy that simply exhibits some of the characteristics of a physical particle, things begin to make more sense. We know by experiment that a photon can transfer its energy to an electron. The photoelectric effect occurs when photons of sufficient energy actually kick electrons off of the surface being struck by light. But even if a given electron hasn't received enough energy from a photon to free it from its material surface, it can receive enough energy to raise it to a higher orbit around its parent nucleus, or even free it from that nucleus. In such cases, the electron can hold that energy for a period of time before falling back to its usual lower-energy orbit and releasing the energy again. This effect explains many phenomena that we can observe directly.

When the photon impacts with the electron, it imparts its energy to the electron. There are several possible results, depending on the energy in the photon: If the photon has insufficient energy to boost the electron to its next higher possible orbit, the electron cannot hold the energy, and releases it again at once, as a photon that matches the incoming photon. The direction of the released photon depends on the nature of the material substance and the energy of the photon itself, so we get phenomena such as reflection and refraction. If the photon has exactly the energy needed to boost the electron to the next higher allowable orbit, the photon will disappear as all of its energy is imparted to the electron. This is a quasi-stable situation; either this electron or another orbiting electron will seek to lose energy by dropping into the vacated orbit, and will release a photon of exactly that energy when it does so. If the photon has eneough energy to boost the electron beyond the next orbital energy level, and possibly to a yet higher orbit around its nucleus, it will do so, and the electron will emit a lower-energy photon if necessary, as it initially drops to the highest-energy orbit it can reach. In the meantime, however, another orbiting electron will lose energy by dropping into the vacated orbit, and will emit a photon of its own as it does so. We see this phenomenon in fluorescent lights. Here, the actual source of light energy is UV light produced by a mercury vapor arc through the glass tube. This would normally be very damaging to the eyes, were it not for the phosphors coating the inside of the glass. That coating absorbs the UV light and emits visible light in return. The photon doesn't always give up all of its energy to the electron it strikes. Under some circumstances, it only gives up part of its energy to the electron, and both a higher-energy electron and a lower-energy photon leave the point of impact. This is known as the Compton Effect. A practical example of this is found in greenhouses, where some wavelengths of incoming sunlight are converted to longer-wavelength infrared (heat) photons, which are then primarily reflected by the glass panes and are therefore trapped inside the greenhouse. Some substances absorb the energy of most incident photons and either transmit (eg., a colored filter) or reflect (eg., a painted surface) photons of a specific amount of energy only. The chlorophyll in green plants gets its energy by reflecting only green light, and absorbing the energy of photons of other colors.

So what is a photon, in a scientific sense? Let's take a look at that on the next page: Characteristics of a Photon. --- Characteristics of a Photon

The original assumption made about electromagnetic waves was that their energy level was continually variable. That is, any change in the energy emitted by the source, from the smallest to the largest possible amount, would be precisely reflected in the energy in the EM wave.

There would seem to be evidence of this intuitive assumption. After all, a radio broadcast station can adjust its power output by very small amounts, and the effective range and coverage of the station changes accordingly, as the broadcast EM wave changes in energy.

But there was a problem with that assumption: it turned out that such an assumption was incompatible with the phenomenon called the photoelectric effect, and with the observed behavior of blackbody radiation. These phenomena could only be explained and mathematically modelled if the energy in an electromagnetic wave could only change in specific, discrete increments. The resulting investigation gave rise to the quantum theory.

Since most of the investigation involved visible and near-visible light, the Greek word photo (meaning "light") was employed here, and the quantum unit of electromagnetic energy was called a "photon." However, the usage of the word photon has since been expanded to cover the entire electromagnetic spectrum.

Photons are often described as "wavelets" because a single photon covers only a very small amount of space. They are also designated as massless particles. But neither of these terms tells adequately just what a photon really is. Calling it "the quantum of electromagnetic energy" tells us nothing new, since the word itself was coined to identify this concept. Therefore, let's define it in a slightly different way: Photon

The minimum "bundle" or "capsule" of energy needed to sustain the electromagnetic phenomenon at a particular frequency.

The above definition specifies that a photon is a self-sustaining "capsule" of energy, but doesn't tell us how much energy is involved. We also know that it is involved with both a magnetic field (commonly identified as the B field) and an electric field (normally called the E field). The figure to the right shows the B field only; the E field would be sticking straight up out of the screen at you, and alternately retreating back into the screen. Although we don't see it here, perhaps we can make some statements about what it must be.

The basic equation that specifies the energy of a photon is given generally as:E = hf = hc

n

In this expression:

E = energy of the photon h = Planck's Constant (= 6.62554�0.00015 � 10-27 erg�seconds) f = The frequency of the wave c = The velocity of light in open space n = The index of refraction of the medium (n = 1 for open space)

= The wavelength of the wave

Planck's Constant can also be expressed as approximately 6.626 � 10-34 joule�seconds or 4.135 � 10-15 eV�seconds.

The above equation implies that the energy of a photon is constant over time, which seems intuitively logical. But we still need to determine what is required inside the photon, in order to accomplish this. How can we do this?

We've been thinking of a photon as it travels through space. However, that same photon also travels through time. That is, it is a phenomenon that has duration. It exists from moment to moment as it moves, not just from place to place. So let's look at the photon at different instants in time, rather than at different places in space.

The first thing we can say in this regard is that the photon exists entirely in the present. That is, it doesn't concurrently spread its energy over the past, present, and future; if we can isolate the photon at any instant of time, the entire photon will exist at that instant.

But how much time is an "instant?" The two fields are constantly changing over time. If we use even a short duration as our "instant," there will still be a change in those fields.

However, we can note that as we make the time interval of our "snapshot" sample shorter, the amount of change is measurably less. So we apply the concept of the limit here: If we keep reducing the time interval, it will approach (but never quite reach) zero time interval as a limit. In the limit, the energy in the electric and magnetic fields will also be unchanging, and we can examine the instantaneous energy content of both fields as a static phenomenon.

The figure above show s eight evenly-spaced "snapshots" of our photon over the duration of one cycle of its wave, at 45� intervals (that's /4 radians between "snapshots.") We will now proceed to look at the magnetic field strength at each "snapshot" and determine, based on the equation for photon energy, how the electric field strength must vary.

For easy reference, I've repeated our figure to the right. The sine wave represents the changing magnetic field strength over time; the value of the sine wave at any single point represents the magnetic field strength at that single instant of time. The energy in the magnetic field is proportional to the square of the field strength. Similarly, the energy in the electric field is proportional to the square of that field's strength at any instant in time.

Now, at time t = 0, the B field has zero strength so it contains zero energy. If the photon is to hold any energy at all, it must all be in the electrical field. Therefore, we would seem to require the E field to be at its peak at time t = 0.

Now we move forward in time. The strength of both fields changes. At time t = a, we have traversed through 1/8th of a cycle. The B field has been increasing in strength, and therefore in energy content. To keep the energy of the photon constant, the E field must have been decreasing in strength over this same time interval.

Move forward again, to time t = b. Now the B field is at its peak, and contains its maximum possible energy. Therefore the E field must be at its minimum, which for a sine wave is zero as it crosses the axis and reverses polarity.

Going on to t = c and t = d, the B field is decreasing to zero, so the E field must be increasing to its peak over the same time interval. This action repeats itself, for the opposite direction of the B field, through the next half-cycle until we get to t = h. At this point, it starts all over again.

This describes the quadrature model of the photon. The peak energy in either field is equal to the total energy of the photon, and energy is constantly being transferred back and forth between the fields as each one repeatedly gives up its entire energy to create the other as they move together through time/space. Essentially, we have a sine wave and a cosine wave forming the two fields. It doesn't matter which one you start with for the picture to be complete and the math to work out. Since the two fields are at right angles to each other (their planes of existence are normal to each other), their individual energies are separate from each other, and the total energy of the photon must be found as the sum of the two at that instant in time. Since the energy in each field is proportional to the square of the field strength, we must work with the squares of these two waveforms. Squaring the instantaneous values of the two waves requires us to make use of a trignonmetric identity:

sin�(t) + cos�(t) = 1

Therefore, the energy of the photon automatically remains constant over the entire cycle and the Law of Conservation of Energy is observed.

Now, we must consider the in-phase model of the photon, which is currently being taught as being in accord with Maxwell's equations. This model requires that the E and B fields be in phase with each other, so they will peak at the same moment and reach zero at the same moment.

If this model is correct, then at time t = 0 in our diagram, both fields contain zero energy. Then the energy in both fields rises until at time t = b both fields have reached their peaks and their energy is maximum. Then they both decrease again in strength until at time t = d their energy is again zero. And this continues with polarity reversing each half-cycle.

Now, looking at this model over the time span occupied by one cycle, we see that the energy of the photon is not constant, but is continually changing between zero and some maximum value. This would seem to defy the (E = hf) equation for the energy of the photon, which says the photon energy depends only on its frequency.

More importantly, it says that the photon is not a closed energy system in and of itself. Since the photon energy varies, any energy not in the photon must necessarily be outside of the photon temporarily, which means it must have been transferred to something else for this instant in time. This in turn gives rise to some obvious questions, which have never been answered to my satisfaction: Where is the missing energy, when it is not part of the photon? You are not allowed to send it to the future or take energy from the past; it must be somewhere in the present. You also can't send it to another photon, since you can't tell how many photons will be present. In fact, in a laser beam, all photons are in phase with each other, so they must all gain or lose energy at the same time. Why doesn't the photon simply vanish when its energy reaches zero? Or, if you prefer, why does the energy return to the photon after it has all left? What is the complete, closed energy system that includes the photon? Why has nobody ever described such an ancillary adjunct to the photon?

There are also some correlaries that would have to be covered, but this would answer the key elements required by the Law of Conservation of Energy.

One other question that has been asked of me is my description of the physical dimensions of a photon. On that topic, I must say that since the photon consists of changing energy fields, the photon encompasses that volume of space in which those energy fields have significant effect.

Thus, if a photon from a radio wave passes close enough to a receiving antenna, it will transfer its energy to the antenna, giving rise to an electrical signal even as the photon itself ceases to exist. The "size" of the photon is that volume of space within which this phenomenon can occur.

The higher the frequency of the photon, the higher its energy level. therefore, such photons will have a correspondingly larger field of influence than their lower-energy counterparts. --- The Photoelectric Effect

Background

In 1887, the German physicist Heinrich Rudolf Hertz discovered an interesting property of matter. This property is that physical materials emit charged particles when they absorb radiant energy (eg, light). Of course, not all substances absorb radiant energy, and the ones that don't will not emit charged particles. But it could readily be established that some substances do behave this way.

Hertz initially observed that the minimum voltage required to draw sparks from a pair of metallic electrodes was reduced when they were bathed in ultaviolet (UV) light, such as from a mercury vapor lamp. The more intense the UV light, the lower the required voltage became.

In the broadest sense, the substance in question can be solid, liquid, or gaseous; the radiant energy must be visible light, UV; X-rays; or gamma rays (cosmic radiation). The charged particles can be electrons or ions. However, in general practical use, the substance is a metal plate and the charged particles are electrons.

In any case, a second German physicist, Philipp Lenard, studied this phenomenon using a metal plate, and in 1900 concluded that the charged particles emitted were the same as those found in cathode rays. That is, they were electrons. By 1902, it had been shown that the resulting current (called photoelectric current because it was caused by light) is proportional to the intensity of the light causing it for any given frequency of light energy, and that the maximum kinetic energy imparted to any electron is independent of the intensity of the light, but is directly proportional to the frequency of the light.

In 1905, Albert Einstein worked out the primary equation involved, and by 1912, the requisite measurements could be made with high precision. These experiments confirmed the conclusion that light is not a continuously wave-like phenomenon, but rather involves particle-like "corpuscles" of energy, now called photons, which are the quanta of electromagnetic energy.

The Experiment

The experiment itself is now performed in appropriate physics classes at most colleges and universities, and possibly in some high schools. It isn't difficult to perform, and if proper care is used, will give quite accurate results.

We begin with a photoelectric tube (or phototube), which is a vacuum tube containing a metal plate curved into a half-cylinder (the anode) and a thin wire electrode (the cathode) along the axis of the cylinder. The figure to the right shows this as seen from the top. We use a very sensitive meter, called a galvenometer (G), to measure the current passing through the tube, and a variable voltage source (V) to control the voltage applied between the two electrodes inside the tube. Finally, we add a light source (usually a mercury vapor lamp, but it can be an arc light or even a tungsten filament light bulb), and a colored filter to limit the light striking the photoelectric tube to a single frequency.

With no light, of course, the current through the tube will be zero, regardless of the applied voltage. (Yes, there is a slight capacitance between the metal plate and the wire, and a high enough voltage will cause an arc. But the capacitance is very slight and will charge quickly, and we won't be using anywhere near enough voltage to cause any problems.) So we turn on the light, place one of our colored filters between the light and the phototube, and begin our measurements.

The first thing we note is that if we reverse the polarity of the voltage source V, increasing the voltage or the intensity of the light will increase the current flow. This seems logical; the light is "kicking" electrons off the metal plate, and they are attracted to the now positively-charged wire electrode. The more light, the more electrons and hence the higher the current.

However, when we make the wire electrode negative with respect to the metal plate as shown in this figure, we begin to observe some interesting effects. First, red light, infrared (IR) radiation and anything of a lower frequency will not excite the phototube enough to enable current to flow. You pretty much have to get up at least to green light before you can measure a reaction. (This may vary depending on the specific metal coating the surface of the curved electrode.)

Once you find a filter whose color allows current to flow through the tube, you can begin to take your measurements.

Plotting the Results

For the experiment itself, the object is to find some voltage, V, which will just prevent any current flow through the phototube. This is the stopping voltage, Vs which is just barely enough to prevent any electrons emitted from the anode plate from reaching the cathode wire. Plot this point on a graph showing voltage on the Y axis and the frequency of the filtered light on the X axis. Thus, you are generating a graph of stopping voltage (Vs) as a function of the frequency of the light reaching the phototube.

Note: The graph shown to the right does not necessarily match the results you would obtain from this experiment, although your results should be similar. The specific materials used in the phototube will have a significant effect on your measured and plotted results.

One interesting fact here is that once you have set the applied voltage to Vs, increasing the intensity of the light reaching the phototube (but not changing the filter) will not enable current to flow again. This is a key point that we will examine more closely later on this page.

Next, we change the filter to some other color and as before seek to find Vs for this particular frequency of light. Again, we plot this point on our graph. We continue this for every filter we have, and then fill in the spaces between our plotted points. If we've been careful enough with our measurements, we will find that the graph plots one of two ways. For all frequencies above a certain minimum, we have a straight line showing a linear relationship between Vs and frequency. Below that minimum frequency, there is no current flow at all, regardless of the applied voltage. If you did not use any filters for these frequencies, this cutoff frequency will not appear directly on your graph. However, you can find this point from your graph. The frequency at which Vs = 0 is the limit to which you can take this experiment; lower frequencies of light will not affect the phototube.

What it All Means

There are two basic factors that control the results of this experiment. First, it takes a certain amount of energy to free an electron from the surface of the metal anode of the phototube. This is known as the work factor. Second, the arriving light clearly imparts a certain kinetic energy to the freed electrons, which enables them to overcome the repulsion effect of the more negative cathode wire, and still cause a current to flow through the phototube. It is that kinetic energy that we are measuring when we adjust the applied voltage V to determine the precise value of Vs. Let's look at these two factors separately.

The Work Factor

When light energy reaches the metal anode, it may be sufficient to push an electron out of its orbit around its parent atom, and move it towards the surface. If this electron is from an atom at the surface of the anode, a certain amount of energy is still required to kick the electron away from the metal and let it fly through space. This energy is a measure of the amount of work required to remove the electrom from its initial environment. Therefore, it is known as the work factor of that particular metal.

Different metals have different work factors, but the work factor of any metal is a characteristic of the metal itself, and does not change for different frequencies of light. Thus, phototubes made of different metal materials will have different work factors, but the work factor for any given phototube will be constant in the experiment.

If the arriving light energy bypasses the first layer or two of atoms at the surface and then frees an electron, that electron will lose energy as it travels past other atoms before it is able to leave the surface. This electron will have less kinetic energy traveling through the vacuum of the tube than one released from a surface atom.

The work factor varies from about 2.2 electron volts (eV) for lithium to 6.35 eV for platinum. Any frequncy of light which cannot impart enough energy to the electrons in these metals to overcome the work factor will fail to cause a current to flow through the experimental circuit.

Measuring the Kinetic Energy of the Electrons

Once an electron has been freed from the surface, it is still moving, and therefore has a certain amount of kinetic energy. We can determine the kinetic energy of the most energetic electrons (often designated kmax) by determining the voltage needed to just prevent them from reaching the cathode of the phototube. The energy involved is then the product of the stopping voltage, Vs, and the electric charge on the electron. That charge is a fixed, known value, designated by the letter "e.". Thus, the product of the charge e and applied voltage V is designated eV and represents energy measured in electron-volts.

So long as we keep our energy units in eV, our experimental stopping voltage, Vs, is a direct measure of the energy needed to exactly cancel the kinetic energy of the free electrons, and hence of the energy imparted to those electrons by the arriving light.

Interpreting the Experimental Results

Although the exact measured results you get will depend on the exact material coating the anode of your phototube, your graph should turn out to be a straight line sloped to show that Vs increases with the frequency of the light used for that measurement. The general equation for this type of line is: Y = mX + B

In this equation, m is the numerical slope of the line, and B is the Y-intercept. In this particular experiment, the general equation becomes: kmax = eVs = hf - W

In this expression,

kmax is the maximum kinetic energy of any electron freed from the anode; e is the charge on any single electron; Vs is the stopping voltage at which conduction is just barely prevented; h is a constant factor; f is the frequency of light used in one particular step in the experiment; W is the work factor of the specific material coating the anode of the phototube.

Even if your filters do not include the specific color whose frequency exactly matches the work function of your phototube's anode, you can extrapolate this value by extending your graph to the frequency (X) axis, which corresponds to Vs = 0. At this frequency, hf = W. Any light at a higher frequency can be used in this experiment. Light at a lower frequency cannot free electrons from the anode of the phototube at all; there is insufficient energy in such light, regardless of its intensity.

This inherent cutoff frequency varies according to the work factor of the phototube's anode, but always works the same way. As a consequence, it is not possible that light (or any electromagnetic wave) can have a continuously variable energy content. Rather, it must be made up of small "corpuscles" of energy such that each "corpuscle" either does or does not have enough internal energy to free one electron from the surface of the anode. More intense light at that frequency has more "corpuscles", but they all have the same amount of energy. If this last point were not true, the higher-energy "corpuscles" could still free electrons that lower-energy "corpuscles" could not affect.

These "corpuscles" are the quanta of electromagnetic energy, and are named photons.

The remaining factor that can be determined experimentally from the graphed results of this experiment is the slope of the line. This value turns out to be just about 4.135 � 10-15 eV�seconds � which is Planck's Constant. Since the freed electrons had a maximum kinetic energy of hf - W electron-volts, the energy in the photon that kicked the electron loose must have been E = hf. This expression relates the energy of the photon to its frequency throughout the electromagnetic spectrum.

The inescapable conclusion of this experiment is that light (or any electromagnetic radiation) is not a continuous phenomenon as originally believed, but rather is made up of discrete "bundles" of energy, now called photons, each of which exists independently of all other photons. It can give up its energy to a physical object such as an electron, but does not transfer energy to or from other photons or manifestations of energy. The energy content of the photon is proportional to its frequency (related by Planck's Constant), but is not controlled by anything else. --- The Transverse Electromagnetic Wave

The basic transverse electromagnetic wave, as shown to the left, involves both a varying electric field and a varying magnetic field, appearing at right angles to each other and to the direction of travel of the wave. This figure represents a single photon traveling through space (and time).

Note especially that the electric and magnetic fields are not in phase with each other, but are rather 90� out of phase. Most books portray these two components of the total wave as being in phase with each other, but I find myself disagreeing with that interpretation, based on three fundamental laws of physics:

Energy is neither created nor destroyed.

The total energy in the waveform must remain constant at all times. Any deviation from this condition constitutes a violation of this law.

The energy in a single photon is given by the expression:E = hv = hc

n

In this expression:

E = energy of the photon h = Planck's Constant v = The frequency of the wave c = The velocity of light in open space n = The index of refraction of the medium (n = 1 for open space)

= The wavelength of the wave

If the photon is not moving through empty space, the index of refraction of the medium must be accounted for, since it reduces the effective value of c.

The above expression leaves no room for fluctuations or variations in energy over time; it implies that the energy of the photon is fixed, and is determined specifically by the frequency (or wavelength) of the wave.

Furthermore, the phenomena of blackbody radiation and the photoelectric effect show that any electromagnetic wave is necessarily composed of independent photons, and is not really a continuously-variable phenomenon of its own.

Now, if the two component waves are asssumed to be in phase with each other, then the total energy of the wave varies from some maximum value to zero, and then back up to the maximum value. This requires that each photon send all of its energy somewhere else twice per cycle, and then receive it back again, an I have yet to see any satisfactory explanation of either where it goes or why it would come back to re-form the photon.

I've decided to end my argument page on the TEM dispute. The best assumption I ever got from anybody was that the energy was in "another part of the wave." But since the wave is necessarily composed of individual photons, that requires that photons trade energy back and forth with each other. This makes no sense anyway, and is quite impossible in a laser beam, where all photons are in phase with each other. Nevertheless, such photons must have the same properties as they do in random light or any other electromagnetic wave.

Beyond that, the electromagnetic wave is generated or emitted over time, so a different part of the wave is not only at a different physical location, it was also created at a different time. It can't very well be part of an energy transfer when it doesn't exist, or with another part of the wave that also doesn't exist. Rather, once energy has been emitted, the amount of emitted energy cannot simply change. We can emit more energy, but we cannot decrease the amount of energy already emitted. A moving electric field creates a magnetic field.

As an electric field moves through space, it gives up its energy to a companion magnetic field. The electric field loses energy as the magnetic field gains energy. Thus, we see a gradual transfer of energy from one form to another, but no loss or gain in the total energy of the wave. A moving magnetic field creates an electric field.

This is exactly similar to the second law listed above. A magnetic field moving through space will transfer its energy gradually to a companion electric field.

These last two laws define the fundamental principles behind all electric motors and generators, as well as transformers. In space or in air, however, they simply mean that the energy in each field transfers itself to the other field, draining itself as it does so. Thus, by setting the two fields as sine waves in quadrature (90� out of phase with each other), we can have a light wave that maintains a constant energy level at all times, and still has its energy constantly being shifted back and forth between electric and magnetic fields.

Incidentally, this phenomenon is not limited to light waves; any electromagnetic radiation behaves the same way. The relationship between the electric and magnetic fields in the wave is also in keeping with the phase relationship between voltage and current in a transmission line and in any antenna system � the signal voltage (which produces the electric field) and the signal current (producing the magnetic field) are in quadrature.

The traditional equations for field strength of the electric (E) and magnetic (B) fields in the electromagnetic wave are: E = Emsin(kx - t) B = Bmsin(kx - t) Em/Bm = c

In these expressions,

E = instantaneous electric field strength Em = maximum or peak electric field strength B = instantaneous magnetic field strength Bm = maximum or peak magnetic field strength kx = an arbitrary offset to the same point in any cycle of the wave

= 2f = wave frequency in radians/second

t = time in seconds c = the speed of light

The two sine functions are quite standard when dealing in sinusoidal waveforms as in this case. We could just as easily use cosine functions; the result would be effectively the same. It has simply become standard practice to use the sine function. If we were dealing with only a single field (E or B, but not both), it would make no difference which function we used. The end result would be the same. The only difference is whether we start at a peak of the wave (cosine) or a zero crossing (sine).

But in this case we have two related energy fields. By arbitrarily assigning the sine function to both of them, traditional physicists have equally arbitrarily assumed the two waves are in phase. I contend that it is just as valid to assign a cosine function to one while the sine function is still assigned to the other. This gives us the following equations: E = Emsin(kx - t) B = Bmcos(kx - t) Em/Bm = c

The only difference this makes is in the assumed phase relationship between the two waves, putting them in quadrature with each other. The magnetic field does not change its properties in any way; only its phase relationship with the electric field.

What this change does accomplish, however, is to make the total energy in a single photon a constant value throughout its entire cycle. This now complies with the Law of Conservation of Energy and with the equation for the energy of a photon. --- Reflection and Refraction

In talking about the fundamental nature of light, we indicated that light tends to travel in a straight line, unless it is acted on by some external force or condition. The obvious next question is, "What kinds of forces or conditions can affect light, and how?"

To answer this question, we start with what we can see in every day life. For example, we already know first hand that light won't pass through the wall of a house, but it will go through a window. Furthermore, some windows introduce noticeable distortion in what we see. Looking carefully at the glass of such a window, we can see that it is uneven, perhaps with ripples across its surface.

We have also seen that some surfaces show accurate images of an actual scene nearby, while other surfaces show distorted images, but most surfaces only show one or more colors no matter how we look at them.

On top of that, some surfaces seem very much darker than their surroundings, while other surfaces seem just as bright as their surroundings. Indeed, occasionally you can see something that looks brighter than its surroundings, both at night and in broad daylight.

In the series of pages in this particular thread, we will first look at the phenomenon of reflection, by which light bounces off of a surface and starts traveling abruptly in a very different direction.

Go to explore reflection now.

Following the discussion of reflection, we will explore the more subtle phenomenon of refraction, where light changes direction, but without reflecting from a surface. If you have already completed the material on reflection, you can follow this link directly to the topic of refraction.

Go to explore refraction now. --- Reflection, Part 1

When light reflects off a surface, it follows some rather basic rules which have been gradually determined by observation. Consider the animation to the left. A ray of light approaches a reflecting horizontal surface at an angle of 45�, bounces from the surface, and leaves at an angle of 45�.

So that we can agree fully on what we are talking about, we need to define a few terms:

Incident Light

Light approaching a surface is known as incident light. This is the incoming light before it has reached the surface.

Reflected Light

After light has struck a surface and bounced off, it is known as reflected light. This is the light that is now departing from the surface.

Angle of Incidence

The angle at which a ray of light approaches a surface, reflective or not, is called the angle of incidence. It is measured from an imaginary line perpendicular to the plane of the surface in question to the incoming ray of light.

Angle of Reflection

Once the light has reflected from a reflective surface, the angle at which the light departs from the surface is called the angle of reflection. This angle is also measured from a perpendicular to the reflecting surface to the departing ray of light.

When light reflects from a surface, the angle of reflection is always equal to the angle of incidence.

When multiple rays of light approach a reflecting surface, each individual ray behaves independently of all the others. Thus, in the figure to the left, each of the three incident rays depicted has its own individual angle of incidence, and each reflected ray has its corresponding angle of reflection. If all three angles of incidence are the same and the surface of reflection is perfectly flat as shown, all three angles of reflection will also be the same.

When the surface is irregular instead of flat, each ray of light still has its angle of incidence and its angle of reflection. However, the angle is measured at the point at which the light strikes the surface. Thus, as shown to the right, light striking an irregular surface gets scattered in all directions upon reflection.

This is the case with ordinary walls and surfaces. Actually, this is all to the good, because it is this scattered reflected light by which we can see such walls and surfaces.

What is far more interesting and useful is what happens when the surface is smooth but curved. We'll see that situation on the next page. --- Now that we have seen what reflection means and how light behaves as it reflects, let's take a look at a couple of special cases. Here, we look at reflecting surfaces that are smooth but curved. As you look at these examples, think of the distortions caused by the mirrors you might see in a fun house. Mirrors bent like this are entertaining, but can also be quite useful.

If the reflecting surface is convex as shown to the left, parallel rays of light striking the surface will diverge from each other evenly. This type of reflector might be used to help illuminate a wider area from a single source of light, or to reflect light onto a shadowed space and allow a wider spread of illumination.

If you look at your reflection in a Fun House mirror of this type, you will find that the farther away you are from the mirror, the larger your reflection appears, but your reflection is always right side up.

This type of mirror, with only a mild curvature, is used to allow a magnified view of a limited area. A typical application is for makeup application, since it allows closer and more accurate control of exactly where and how the makeup is applied.

When the surface is concave as shown to the right, light coming towards the mirror tends to converge towards a small area before continuing outward and away from the mirror. If you look at your own reflection in such a mirror, standing close you will see a normal but smaller reflection. As you back away, your reflection gets smaller yet, until you find a point where your reflection shrinks to a very small spot and nearly disappears! The point at this distance from the mirror is called the focus of the mirror, because the mirror tends to concentrate, or focus, all incoming light towards this point.

As you step farther back from the mirror, your reflection gets larger again, but is inverted (upside down), because light from the bottom of the mirror is now above your eyes, while light from the top is below your eyes.

If the mirror is shaped precisely as a solid, three-dimensional parabola, light arriving in parallel rays will converge to a very tight point, which is the focus of the parabola. This is the technique used in reflecting telescopes. It is also used in the other direction in spotlights. By putting a powerful light source at the focus, we can get a tight, parallel shaft of light to illuminate or highlight, for example, a single actor on a stage.

We'll halt the discussion of reflection for now, and go on to refraction. That topic is somewhat less intuitive than reflection, but is still reasonable once you identify in your own mind the essential factors that cause this phenomenon. --- Refraction, Part 1

Refraction is the name given to the observed phenomenon that light changes direction, or "bends," as it passes the boundary between one medium and another. This is shown to the right, in a general sense.

Here, we see a beam of light traveling through air, until it meets a pool of water. It arrives at some angle to the surface as shown. As it passes through the boundary, going from air into water, it actually slows down. Since even a single ray of light has a finite thickness, the part that enters the water first slows down first, causing the light ray to change direction to a steeper angle in the water.

If we change the angle at which the light enters the water, we find that the angle of the light in the water also changes, such that we see no change at all if the light source is directly overhead so that the entering ray of light is perpendicular to (in mathematical terms normal to) the surface. As we change the entering angle more and more away from the perpendicular, we see that the ray of light in the water has bent more and more away from the direction taken by that ray of light in the air.

To describe this phenomenon mathematically, we will measure the angle of incidence, i, in the same way we did when discussing reflection. Instead of an angle of reflection, however, this time we have an angle of refraction, r. Both angles are measured from a line normal to the boundary between the two media. However, unlike the phenomenon of reflection, the angle of refraction is unlikely to be the same as the angle of incidence in the general description of refraction.

The basic Law of Refraction was first formulated by Willebrord Snell in 1621. Consider the diagram to the left. We see here two parallel rays of light in red. They are passing through a boundary between air and water at a measurable angle of incidence, i. The rays of light in the water remain parallel, and are now leaving the boundary at a measurable angle of refraction, r.

We now apply a little plane geometry and a small amount of trigonometry. We start by drawing line AB at right angles to the right-hand ray of light, in air. This forms right triangle ABC, such that angle BAC is equal to i. We also draw line CD at right angles the the left-hand ray of light, in water. This gives us right triangle ACD, whose angle ACD is equal to r.

If we now measure the lengths of lines BC and AD along the rays of light, we find that these two lengths have a consistent 4:3 relationship. That is, if we divide line BC into four equal parts, line AD will be exactly three of these parts in length. This remains true for any angle of incidence greater than 0. (At i = 0, r also becomes 0, and no visible refraction occurs.) Mathematically, BC = 4 = 1.33 = n,

AD 3

where n is the index of refraction of water.

Using some basic trigonometry, we note that line AC in this figure is the hypoteneuse for both of the right triangles we drew. Therefore,

BC = AC sin i AD = AC sin r

andAC sin i = sin i = 1.33 = n

AC sin r sin r

All materials through which light can pass have a measurable index of refraction, which is constant for the specific material involved. For water, this index is 1.33.

The other two materials of greatest interest to the technical community are glass and plastic. Although glass can be manufactured with any number of additives to control various physical properties, its basic structure is silicon dioxide. The nominal index of refraction for glass is about 1.50, with higher numbers for specific additives.

Plastics can be manufactured with many different compositions, so there is no basic index of refraction for the general category of plastic. --- Refraction, Part 2

While Snell was defining his Law of Refraction, many scientists were trying to determine whether light had a finite velocity, and if so, what that velocity might be. It took many years to develop methods and instruments capable of performing such a measurement, and the earliest estimates were of course quite inaccurate.

However, in 1849, H. L. Fizeau came pretty close, with a velocity of about 313,000,000 meters per second (m/s) in air. In 1926, Albert Michelson refined this figure, and also measured the velocity of light in water and in glass. His results were:Air: 2.9979 x 108 m/s (use 3.00 x 108 m/s) Water: 2.25 x 108 m/s Glass: 2.00 x 108 m/s

If we compare the velocity of light in air to that in water, we find that:C = 3.00 x 108 = 1.33

VWATER 2.25 x 108

But wait a minute! That value of 1.33 is also the measured index of refraction of water, as determined by Snell in 1621. Snell knew nothing about the velocity of light; he was measuring the observable physical phenomenon. Are the two phenomena related?

In fact, they are directly related. It is because light slows down when it travels through water that we even have the phenomenon of refraction. The relative velocity of light through water (or any other medium) determines the extent to which that light is refracted at the boundary. Thus, we can calculate the index of refraction of any material in either way: by measuring the velocity of light within that material and substituting it for VWATER in the equation above, or by measuring the angles of incidence and refraction and performing Snell's calculation. If both calculations are done correctly, the results will be the same.

For instance, we can calculate the index of refraction of glass from the velocity of light, as above:C = 3.00 x 108 = 1.50 = nGLASS

VGLASS 2.00 x 108

Actually, glass may be made with different additives, so the index of refraction of a specific piece of glass may range from 1.50 to 1.60 or so. This can be very useful, as you can see if you look over the section on fiber optics.

More recent tests using modern technology have shown that the velocity of light in air is actually slightly less than in a true vacuum. By definition, nVACUUM = 1.000000. Current measurements show that nAIR = 1.000290 with slight variations due to the fact that air pressure and density vary with the weather. --- Introduction to Lenses

In the section on reflection and refraction, we looked at the reflection of light from flat and curved surfaces, and the refraction of light at a plane boundary between media of different densities. Now we ask the question, "What happens if the refractive boundary between media is curved rather than being a plane surface?" We'll examine the possibilities in this series of pages.

To the right is a cross section of a shaped piece of glass. Everyone has seen this sort of thing many times. It's a circular piece of glass that's thick in the middle and thin around the edge.

Ideally, the curve of the lens cross section is parabolic. However, it is difficult and expensive to grind lenses to that precise shape, so many lenses are ground with a circular cross section instead. This works acceptably for many applications, since the "nose" of a parabola almost exactly coincides with a portion of a circle. However, such lenses do not operate perfectly, and do introduce some distortion. In our discussion of lens optics, we will assume ideal lenses for our calculations and descriptions, unless otherwise noted.

It's not necessary for a lens to be thicker in the middle than at the edges. Just the opposite is shown in the cross section to the right. This type of lens also has its uses, and has a number of practical applications.

It is not necessary for the two sides of a lense to be the same. Often one side is simply flat. We can also have a lens with a concave side and a convex side. In the latter case, the lens does not have to be the same thickness at all points.

In this set of pages, we will look at various lenses to see how they behave and how they can be used in practical situations. --- The Convex Lens

The most commonly-seen type of lens is the convex lens. This type of lens is often used for close examination of small objects, such as rare stamps or coins. Children often use such a lens to concentrate sunlight to burn small pinholes in pieces of paper. That result by itself shows the power of concentrated light from the sun. But there must be more to it than that. Let's see if we can define the behavior of lenses a bit more specifically.

The figure to the right shows a double convex lens with several rays of light approaching from its left. We show each ray as a different color here, simply to more easily follow each ray's progress. We will assume that the lens is made of glass with a nominal index of refraction of 1.50.

The rays are parallel as they approach the lens. As each ray reaches the glass surface, it refracts according to the effective angle of incidence at that point of the lens. (See the pages on refraction for the definitions and descriptions of these terms.) Since the surface is curved, different rays of light will refract to different degrees; the outermost rays will refract the most.

As the light rays exit the glass, they once again encounter a curved surface, and refract again. This further bends the rays of light towards the centerline of the lens (which coincides with the green light ray in the figure).

We will assume that each convex surface is spherically ground, but that the portion of the sphere actually used coincides with the ideal parabolic shape. Also, we will --- How Optical Fibers Work, Part 1

Fiber optics is one of the newer buzzwords these days. Optical fiber has a number of advantages over the copper wire used to make connections electrically. For example, optical fiber, being made of glass (or sometimes plastic), is immune to electromagnetic interference, such as is caused by thunderstorms. Also, because light has a much higher frequency than any radio signal we can generate, fiber has a wider bandwidth and can therefore carry more information at one time.

But just how does it work? We're talking about a thin, flexible "string" of glass. Looking sideways at it, we can see right through it. How can we keep light that's inside the fiber from getting out all along the length of the fiber?

Consider an ordinary glass of water. We know that if we look through the water at an angle, images will appear distorted. This happens because light actually slows down a little bit when it enters the water, and speeds up again when it moves back into the air again.

Since the light has a slight but measurable width, if it hits the water at an angle, the part of the light that hits the water first will slow down first. The result is that the direction the light is traveling changes, and the path of the light actually bends at the surface of the water.

No matter what angle the light is traveling as it approaches the water, it will take a steeper angle once it actually enters the water. You can see this at any time by looking at a picture or newspaper through a glass of water, and by looking at different angles. Even a straw in a glass of water looks bent, although it really isn't. This phenomenon is called refraction.

The same phenomenon happens with glass, although we don't usually notice it when looking through a window. Nevertheless, light striking the glass at an angle bends as it slows down within the glass, and then bends again as it speeds up when leaving the glass. You can see this phenomenon clearly if you slide a piece of flat glass over the print in a book or newspaper.

Any substance that light can travel through will exhibit this phenomenon to some extent. Glass happens to be a very practical choice for optical fiber because it is reasonably strong, flexible, and has good light transmission characteristics.

The question to be answered now is, "How can we use this phenomenon to keep the light inside the glass, especially if we want to bend the glass (with the light still inside) around corners?" We will start looking at that on the next page. --- How Optical Fibers Work, Part 2

Now, consider looking into a glass of water from below the surface of the water. If you look up through the bottom of the glass, you will see a somewhat distorted view of the ceiling or whatever is above the glass. However, if you look in from the side of the glass and observe the underside of the top surface, you will begin to note an interesting and useful effect.

If you are looking up from a steep angle, the light you see entered the top surface of the water at a shallower angle, as shown on the left. However. as you look at the underside of the top surface from a shallower angle, as shown on the right, you will find a point at which light can't enter the top surface at a yet shallower angle. At this point, the top surface of the water looks like a perfect mirror, even though you know it isn't.

Now, the light you see is reflected from the surface, rather than being refracted through it. This effect persists for all angles shallower than the critical angle at which the phenomenon first appears. As you might expect, the same phenomenon is exhibited by glass or any other material through which light might pass. --- Consider a single glass fiber, such as the one shown in an enlarged view here. The actual fiber is so thin that light entering one end will experience the "mirror effect" described in part 2 of this discussion every time it touches the wall of the fiber. As a result, the light will travel from one end of the fiber to the other, bouncing back and forth between the walls of the fiber.

This is the basic concept of optical fibers, and it correctly describes the fundamental operation of all such fibers. Unfortunately, it is not possible to use fibers of this basic construction for any practical application. The reason for this has to do with the physical realities of the phenomenon of reflection within the fiber, and how the parameters involved will change under different conditions.

The basic fact governing the reflection of light within the fiber has to do with the speed of light inside the fiber, and the speed of light in the medium just outside the fiber. Every possible material through which light can pass has a characteristic called the refractive index, which is a measure of the speed of light through that material as compared to the speed of light in open space. We won't get into the mathematics in this demonstration; it is only necessary for you to understand this concept.

One of the requirements of an optical fiber is that its diameter remain constant throughout its length. Any change in the thickness of the fiber will affect the way light reflects from the inner walls of the fiber. In some cases, this could even mean that the reflected light could exceed the critical angle required for total reflection, and so be lost through the walls of the fiber.

Unfortunately, the same effect will be noticed if the characteristics of the medium outside the fiber should change. For example, if the fiber gets wet (as it would in rain, fog, or some underground situations), the characteristics of the boundary between the inside and the outside of the fiber will change, and hence the effective shape of the fiber will change, and will keep changing as drops of water move along the surface of the fiber.

The question now is, "How can we make the fiber so the boundary layer is permanently fixed and precisely predictable?"

All pages on www.play-hookey.com copyright � 19 --- How Optical Fibers Work, Part 4

The easiest way to ensure that the boundary between the inside of the fiber and the outside of the fiber remains constant and unchanging no matter what is to create a permanent boundary of known characteristics. The practical approach is to surround the glass fiber with another layer of glass, while making sure that the speed of light in the outer layer remains faster than the speed of light in the inner fiber. The result is shown here.

In this figure, the original fiber is now the core of a two-layer construct. The diameter of the core is kept constant, at approximately 50 to 60 �m (micrometers, at one time designated "microns") and its surface is kept as perfectly smooth as possible. The outer layer, known as cladding, is bonded at all points to the surface of the core.

To the outside world, this construction is effectively one solid piece of glass, even though it is constructed of two different types of glass. Thus, it is impervious to water, dirt, and other materials. If the outer surface gets wet, that makes no difference because it still doesn't affect the boundary between the core and the cladding. The whole composite fiber may be covered with rubber or plastic for easier handling and visibility.

This type of optical fiber is known as a multi-mode step-index fiber, because of the fixed and definite boundary, or step, between the core and the cladding, as well as the fact that light traveling through the fiber may assume any of several possible electromagntic "modes." This is the first successful type of optical fiber that was developed. Since then, more advanced types of optical fibers, such as graded-index and single-mode fibers have been produced. We'll get into those a little later, as additional pages in this series are developed. --- How Optical Fibers Work, Part 5

We said earlier that light is trapped inside the core of the optical fiber because the speed of light in the cladding is higher than the speed of light in the core. The obvious next questions are, "How much faster?" and, "How can we make it different for different parts of the glass fiber?"

The answer to both questions lies in the various additives that may be used in the glass-making process. While it is not our purpose here to discuss glass additives at any length, a few words are in order.

Glass is primarily made from molten silica (sand), although flint and quartz may also be used, and are used for specific purposes. However, if you just melt ordinary sand, the resulting glass is likely to be green or brown, due to the presence of iron in the mix. To eliminate that color, early glass workers learned to add manganese.

Most manufactured glass is actually soda-lime glass. This is commonly used for bottles, tableware, light bulbs, windows, and plate glass. Glass known as "crystal" is a potassium silicate mix that also includes lead oxide. Hence this is sometimes called "lead glass." Glass that must be resistant to chemicals and high temperatures has a fair amount of borax added. All additives will have an effect on the melting temperature of the glass, as well as on the density of (and therefore the speed of light inside) the glass.

When we speak of optical fibers, we don't normally discuss the actual speed of light in the fiber, but rather of the index of refraction of the glass itself.

Index of Refraction

The ratio of the speed of light in a vacuum to the speed of light in the specified medium. This is expressed as a positive real number greater than 1.

The speed of light in a vacuum such as open space is just slightly less than 300,000,000 meters per second (current measurements place it at very nearly 299,792,500 meters per second, give or take up to 200 m/s). For practical calculations, we'll just use the approximation.

The speed of light in water is 225,000,000 meters per second. Therefore, the index of refraction of water is:300,000,000 = 1.33

225,000,000

In typical glass such as is used for optical fibers, the speed of light might well be about 200,000,000 m/s. The index of refraction for such glass would be:300,000,000 = 1.50

200,000,000

In a real-world, practical fiber, this might describe the cladding, while the core would have a refractive index of perhaps 1.55 to 1.60. Such a combination is quite effective in keeping the bulk of the light energy inside the core, so that it can accomplish something when it reaches its destination. --- How Optical Fibers Work, Part 6

The biggest problem with any optical fiber has to do with losses in one form or another. Some losses, such as the absorption of some light energy by the glass itself, cannot be avoided. But there are other kinds of problems that can be reduced by careful design of the fiber.

If a narrow pulse of light (light of brief duration, such as might be produced by a flashbulb) is applied to one end of an optical fiber, the pulse of light at the far end will have a lower amplitude and a longer duration, as shown here. In this image, a narrow pulse of light enters the fiber from the left, and a wider, weaker pulse leaves the fiber at the right:

This phenomenon is called pulse dispersion or pulse spreading, and has three basic causes. These are:

Modal Dispersion

Not all light travels as the basic wave we showed earlier. It has many different modes, characterized by different relationships between the electric and magnetic fields that make up the total electromagnetic wave. The key point for our purposes is that the higher, more complex propogation modes take longer to travel a given distance in any medium, and they require a wider path than the simpler, basic mode.

The larger the diameter of an optical fiber's core, the more different propogation modes it can support, and the more pronounced the modal dispersion effect will be. On the other hand, if we make the core small enough, we can block all except the basic mode, and minimize this effect. Such a fiber is called a single-mode fiber.

Material Dispersion

The velocity of propogation through the core is not the same for all colors (or wavelengths) of light. "White" light actually contains all visible colors, and a narrow white pulse entering the fiber will produce a series of overlapping pulses of different colors at the far end.

The solution to this problem is to use an LED or laser diode as the light source, so that all of the light passing through the fiber is at very nearly the same wavelength.

Waveguide Delay Distortion

This is a phenomenon observed first with microwaves traveling through waveguides. An optical fiber is essentially a waveguide for light waves, and exhibits the same behavior: each propogating mode within the fiber experiences a slight dispersion effect simply because of the confining waveguide, which cannot behave as if it were open space.

This dispersion effect is quite small but cannot be eliminated. It can pretty much be ignored, unless you are trying to push the communications speed of the optical fiber to its limits.

The basic problem caused by any dispersion effect is that it limits the rate at which data may be transmitted through the fiber. If the light amplitude is modulated at too high a rate, dispersion tends to level out the changes so that the light at the far end of the fiber is of a nearly constant amplitude. The end result is that the modulations become indecipherable, and all data is lost.

Semiconductors

Other

Optics Notes

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Notes

7.0 RF/Microwave

7.1	Smith Chart
7.2	Transmission Lines
7.3	S-Parameters

8.0 Communications

8.1	Transforms

8.1.1 Fourier 8.1.2 Laplace 8.1.3 Z-transform

8.2	Modulation

8.2.1 AM 8.2.2 FM 8.2.3 PCM 8.2.4 FSK 8.2.5 QAM

9.0 Mathematics

9.1	Trigonometry
9.2	Eulers Identity
9.3	Phasors
9.4	Diffy Q's

10.0 Filter Theory

10.1	Filter Types

10.1.1 Low Pass 10.1.2 High Pass 10.1.3 Band Pass 10.1.4 Band Reject

10.2	Filter ????

10.2.1 Butterworth 10.2.2 Chebyshev 10.2.3 Elliptical

10.3	Digital Filters

10.3.1 IIR 10.3.2 FIR

12.0 Environmental Considerations

12.1	Temperature
12.2	Humidity
12.3	Fungus
12.4	Vibrataion
12.5	Shock
12.6	Chemical Resistance

Reference

Appendices

Glossary

Crest Factor

Index

References

Bibliography